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[8.43.85.97]) by mx.google.com with ESMTPS id z20-20020a05622a061400b00418e6893fcasi6070270qta.614.2023.11.14.01.46.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 01:46:18 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F127F385843A for ; Tue, 14 Nov 2023 09:46:17 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 9A1B43858C52 for ; Tue, 14 Nov 2023 09:45:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9A1B43858C52 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 9A1B43858C52 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699955148; cv=none; b=RtMCNSVUYbVFCxCMgvJj0teCWki2VIwSr8n3W1yGQgFsMZGg4MIic+ordRKzueutoPnOKPwApkAaoVNGV9pqyhDk0Kzylum238ArJXg9op+ByA0zQFKVEwXZMzwSnLZYDEOPSL1U/XfKwdh3H0gtkJt6ZyJoNK0grkQ2urRCHjs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699955148; c=relaxed/simple; bh=WWjq18ozy7FunpuUe7XYv3H/GAIX7WH+AQ+jhGG2Y0o=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=hcrrz3dxoQZ8xMcPPCSCOUV2yCjH6HeHIRli90rS/fQAv1BOPLiV1iw9LhSn6Utqz0A91GgWcylM6b9VrYU4Q1GGy/2BzVTLDrbUh7sg6+tKSP8Oovxsdeo0ORV3x2MGZnN4vgVnKT4+4JUTLgxLdfYOvni1TczNzNWE1bBYxkU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r2pzJ-0000eu-MP for gcc-patches@gcc.gnu.org; Tue, 14 Nov 2023 04:45:44 -0500 Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8Cx77u3QVNlKOg5AA--.54741S3; Tue, 14 Nov 2023 17:45:28 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxri+0QVNlm8pBAA--.12018S2; Tue, 14 Nov 2023 17:45:25 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, Lulu Cheng Subject: [PATCH v1] LoongArch: Added code generation support for call36 function calls. Date: Tue, 14 Nov 2023 17:45:01 +0800 Message-Id: <20231114094500.8160-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxri+0QVNlm8pBAA--.12018S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW3uF4UZr18uw4UZr1kWF15Awc_yoWkJF1kpF WUZw13AF48Xr4IkwsIqr93Xws8Ar1agry2yayayrZ8Cw48Xryqv3Wvkr9IqF1Uua1rK342 vr4Fga129a1UZ3XCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU7pnQUUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=chenglulu@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_STOCKGEN, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782532200825725399 X-GMAIL-MSGID: 1782532200825725399 When compiling with '-mcmodel=medium', the function call is made through 'pcaddu18i+jirl' if binutils supports call36, otherwise the native implementation 'pcalau12i+jirl' is used. gcc/ChangeLog: * config.in: Regenerate. * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro. * config/loongarch/loongarch.cc (loongarch_legitimize_call_address): If binutils supports call36, the function call is not split over expand. (loongarch_option_override_internal): If use call36, then turn off fipa-ra. * config/loongarch/loongarch.md: Add call36 generation code. * config/loongarch/predicates.md: Likewise. * configure: Regenerate. * configure.ac: Check whether binutils supports call36. --- gcc/config.in | 6 ++ gcc/config/loongarch/loongarch-opts.h | 4 + gcc/config/loongarch/loongarch.cc | 20 +++- gcc/config/loongarch/loongarch.md | 138 +++++++++++++++++++++----- gcc/config/loongarch/predicates.md | 7 +- gcc/configure | 32 ++++++ gcc/configure.ac | 6 ++ 7 files changed, 182 insertions(+), 31 deletions(-) diff --git a/gcc/config.in b/gcc/config.in index 0509ba7e6a7..946b8fe39c7 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -775,6 +775,12 @@ #endif +/* Define if your assembler supports call36. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_SUPPORT_CALL36 +#endif + + /* Define if your assembler and linker support thread-local storage. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_TLS diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index f204828015e..f1d36e8acfd 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -97,6 +97,10 @@ loongarch_update_gcc_opt_status (struct loongarch_target *target, #define HAVE_AS_EXPLICIT_RELOCS 0 #endif +#ifndef HAVE_AS_SUPPORT_CALL36 +#define HAVE_AS_SUPPORT_CALL36 0 +#endif + #ifndef HAVE_AS_MRELAX_OPTION #define HAVE_AS_MRELAX_OPTION 0 #endif diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index c782f571abc..5c8ba96118e 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -3006,12 +3006,16 @@ loongarch_legitimize_call_address (rtx addr) enum loongarch_symbol_type symbol_type = loongarch_classify_symbol (addr); - /* Split function call insn 'bl sym' or 'bl %plt(sym)' to : - pcalau12i $rd, %pc_hi20(sym) - jr $rd, %pc_lo12(sym). */ + /* If add the compilation option '-cmodel=medium', and the assembler does + not support call36. The following sequence of instructions will be + used for the function call: + pcalau12i $rd, %pc_hi20(sym) + jr $rd, %pc_lo12(sym) + */ if (TARGET_CMODEL_MEDIUM - && TARGET_EXPLICIT_RELOCS + && !HAVE_AS_SUPPORT_CALL36 + && (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) && (SYMBOL_REF_P (addr) || LABEL_REF_P (addr)) && (symbol_type == SYMBOL_PCREL || (symbol_type == SYMBOL_GOT_DISP && flag_plt))) @@ -7478,8 +7482,14 @@ loongarch_option_override_internal (struct gcc_options *opts, } break; - case CMODEL_TINY_STATIC: + /* When function calls are made through call36, t0 register will be + implicitly modified, so '-fno-ipa-ra' needs to be set here. */ case CMODEL_MEDIUM: + if (HAVE_AS_SUPPORT_CALL36) + opts->x_flag_ipa_ra = 0; + break; + + case CMODEL_TINY_STATIC: case CMODEL_NORMAL: case CMODEL_TINY: case CMODEL_LARGE: diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 4dd716e1941..7febb7bf8ba 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -3274,10 +3274,25 @@ (define_insn "sibcall_internal" [(call (mem:SI (match_operand 0 "call_insn_operand" "j,c,b")) (match_operand 1 "" ""))] "SIBLING_CALL_P (insn)" - "@ - jr\t%0 - b\t%0 - b\t%%plt(%0)" +{ + switch (which_alternative) + { + case 0: + return "jr\t%0"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%0)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%0"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%0)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%%plt(%0)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@sibcall_internal_1" @@ -3337,10 +3352,25 @@ (define_insn "sibcall_value_internal" (call (mem:SI (match_operand 1 "call_insn_operand" "j,c,b")) (match_operand 2 "" "")))] "SIBLING_CALL_P (insn)" - "@ - jr\t%1 - b\t%1 - b\t%%plt(%1)" +{ + switch (which_alternative) + { + case 0: + return "jr\t%1"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%1"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%%plt(%1)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@sibcall_value_internal_1" @@ -3360,10 +3390,25 @@ (define_insn "sibcall_value_multiple_internal" (call (mem:SI (match_dup 1)) (match_dup 2)))] "SIBLING_CALL_P (insn)" - "@ - jr\t%1 - b\t%1 - b\t%%plt(%1)" +{ + switch (which_alternative) + { + case 0: + return "jr\t%1"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%1"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; + else + return "b\t%%plt(%1)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@sibcall_value_multiple_internal_1" @@ -3403,10 +3448,25 @@ (define_insn "call_internal" (match_operand 1 "" "")) (clobber (reg:SI RETURN_ADDR_REGNUM))] "" - "@ - jirl\t$r1,%0,0 - bl\t%0 - bl\t%%plt(%0)" +{ + switch (which_alternative) + { + case 0: + return "jirl\t$r1,%0,0"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%0)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%0"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%0)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%%plt(%0)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@call_internal_1" @@ -3465,10 +3525,25 @@ (define_insn "call_value_internal" (match_operand 2 "" ""))) (clobber (reg:SI RETURN_ADDR_REGNUM))] "" - "@ - jirl\t$r1,%1,0 - bl\t%1 - bl\t%%plt(%1)" +{ + switch (which_alternative) + { + case 0: + return "jirl\t$r1,%1,0"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%1"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%%plt(%1)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@call_value_internal_1" @@ -3490,10 +3565,25 @@ (define_insn "call_value_multiple_internal" (match_dup 2))) (clobber (reg:SI RETURN_ADDR_REGNUM))] "" - "@ - jirl\t$r1,%1,0 - bl\t%1 - bl\t%%plt(%1)" +{ + switch (which_alternative) + { + case 0: + return "jirl\t$r1,%1,0"; + case 1: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%1"; + case 2: + if (TARGET_CMODEL_MEDIUM) + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; + else + return "bl\t%%plt(%1)"; + default: + gcc_unreachable (); + } +} [(set_attr "jirl" "indirect,direct,direct")]) (define_insn "@call_value_multiple_internal_1" diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md index 946ed0d8212..56f7c48e126 100644 --- a/gcc/config/loongarch/predicates.md +++ b/gcc/config/loongarch/predicates.md @@ -443,7 +443,9 @@ (define_predicate "const_call_insn_operand" { case SYMBOL_PCREL: if (TARGET_CMODEL_EXTREME - || (TARGET_CMODEL_MEDIUM && !TARGET_EXPLICIT_RELOCS)) + || (TARGET_CMODEL_MEDIUM + && HAVE_AS_SUPPORT_CALL36 + && (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE))) return false; else return 1; @@ -452,7 +454,8 @@ (define_predicate "const_call_insn_operand" if (TARGET_CMODEL_EXTREME || !flag_plt || (flag_plt && TARGET_CMODEL_MEDIUM - && !TARGET_EXPLICIT_RELOCS)) + && HAVE_AS_SUPPORT_CALL36 + && (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE))) return false; else return 1; diff --git a/gcc/configure b/gcc/configure index 0d818ae6850..d28a4536f45 100755 --- a/gcc/configure +++ b/gcc/configure @@ -29349,6 +29349,38 @@ if test $gcc_cv_as_loongarch_explicit_relocs = yes; then $as_echo "#define HAVE_AS_EXPLICIT_RELOCS 1" >>confdefs.h +fi + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for call36 support" >&5 +$as_echo_n "checking assembler for call36 support... " >&6; } +if ${gcc_cv_as_loongarch_call36+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_loongarch_call36=no + if test x$gcc_cv_as != x; then + $as_echo 'pcaddu18i $r1, %call36(a) + jirl $r1, $r1, 0' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_loongarch_call36=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_call36" >&5 +$as_echo "$gcc_cv_as_loongarch_call36" >&6; } +if test $gcc_cv_as_loongarch_call36 = yes; then + +$as_echo "#define HAVE_AS_SUPPORT_CALL36 1" >>confdefs.h + fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for eh_frame pcrel encoding support" >&5 diff --git a/gcc/configure.ac b/gcc/configure.ac index 764a33f0b04..c489ba6a39b 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -5441,6 +5441,12 @@ x: [a:pcalau12i $t0,%pc_hi20(a)],, [AC_DEFINE(HAVE_AS_EXPLICIT_RELOCS, 1, [Define if your assembler supports explicit relocation.])]) + gcc_GAS_CHECK_FEATURE([call36 support], + gcc_cv_as_loongarch_call36,, + [pcaddu18i $r1, %call36(a) + jirl $r1, $r1, 0],, + [AC_DEFINE(HAVE_AS_SUPPORT_CALL36, 1, + [Define if your assembler supports call36.])]) gcc_GAS_CHECK_FEATURE([eh_frame pcrel encoding support], gcc_cv_as_loongarch_eh_frame_pcrel_encoding_support,, [.cfi_startproc