diff mbox series

[Committed] RISC-V: Fix init-2.c assembly check

Message ID 20231114032116.3273076-1-juzhe.zhong@rivai.ai
State Unresolved
Headers
Series [Committed] RISC-V: Fix init-2.c assembly check |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

juzhe.zhong@rivai.ai Nov. 14, 2023, 3:21 a.m. UTC 
  Notice the assembly check of init-2.c is wrong.

Committed.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls/init-2.c: Fix vid.v check.

---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
index f27c395441b..ae31e227ad1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
@@ -45,4 +45,4 @@  DEF_INIT (v128uhi, uint16_t, 128, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
 	  113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,
 	  127)
 
-/* { dg-final { scan-assembler-times {vid\.vx} 494 } } */
+/* { dg-final { scan-assembler-times {vid\.v} 14 } } */