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[8.43.85.97]) by mx.google.com with ESMTPS id de41-20020a05620a372900b0076d74f9006dsi4730602qkb.330.2023.11.13.06.31.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 06:31:35 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 182D238C0C1C for ; Mon, 13 Nov 2023 14:29:04 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 5F96C38618BB for ; Mon, 13 Nov 2023 14:27:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5F96C38618BB Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5F96C38618BB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699885653; cv=none; b=XcT8zYrBTyU0zqJWrAlvBvLk77jVOMdUE4aOgtMzfPkXJM30oNlGrFoaxborujbBOnhMpSg1JebOZvDwN7q4VeQwScXOQRjbFe+Twci7Q+cfUFinLmGOghztztKzjyU0lWioj4dU8viR7bqr7q+1jZQMmGw7pvcykqB19ZmCpU0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699885653; c=relaxed/simple; bh=NzZXrw/cv3pzqX8CPugwQBanXAzCOFw5Vav3mxT39hk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=G8tesFGYJuL9TatMyFE8sue75rg0q5t2aLQnD6JQXFTb7icM/aGGQ16ksAQAbsAIhY/HiyjIvmMYRcG++XGPDwlsjo6m8w7UNYi5nBwAMa8I1fGtYIW966PbGuVMf1Q/wVL+MdAsKliRxnhjihNY74ovwWRO7N23w/TpYmdy4V8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 93B3DFEC; Mon, 13 Nov 2023 06:28:17 -0800 (PST) Received: from e126323.arm.com (unknown [10.57.41.187]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A512E3F7B4; Mon, 13 Nov 2023 06:27:31 -0800 (PST) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [committed 12/22] arm: testsuite: improve compatibility of pragma_arch_attribute*.c Date: Mon, 13 Nov 2023 14:26:48 +0000 Message-Id: <20231113142658.69039-13-rearnsha@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231113142658.69039-1-rearnsha@arm.com> References: <20231113142658.69039-1-rearnsha@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782459553273250690 X-GMAIL-MSGID: 1782459553273250690 These tests use pragmas adn attributes to change the architecture. Sometimes they simply add a feature using "+crc", but other times they try to completely reset the architecture using "arch=armv8-a+crc". The latter fails on a hard-float ABI with -mfpu=auto because it also clears the FP capability. Fix by adding +simd when the full architecture is specified. gcc/testsuite: * gcc.target/arm/pragma_arch_attribute.c: Add +simd to pragmas that set an explicit architecture. * gcc.target/arm/pragma_arch_attribute_2.c: Likewise. * gcc.target/arm/pragma_arch_attribute_3.c: Likewise. --- gcc/testsuite/gcc.target/arm/pragma_arch_attribute.c | 6 +++--- gcc/testsuite/gcc.target/arm/pragma_arch_attribute_2.c | 2 +- gcc/testsuite/gcc.target/arm/pragma_arch_attribute_3.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute.c b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute.c index a06dbf04037..a5e1edad3a4 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute.c +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute.c @@ -10,7 +10,7 @@ #endif #pragma GCC push_options -#pragma GCC target ("arch=armv8-a+crc") +#pragma GCC target ("arch=armv8-a+simd+crc") #ifndef __ARM_FEATURE_CRC32 # error "__ARM_FEATURE_CRC32 is not defined in push 1." #endif @@ -41,7 +41,7 @@ void test_crc_unknown_ok_attr_1 () # error "__ARM_FEATURE_CRC32 is defined after attribute set 1." #endif -__attribute__((target("arch=armv8-a+crc"))) +__attribute__((target("arch=armv8-a+simd+crc"))) void test_crc_unknown_ok_attr_2 () { __crc32b (0, 0); @@ -51,4 +51,4 @@ void test_crc_unknown_ok_attr_2 () # error "__ARM_FEATURE_CRC32 is defined after attribute set 2." #endif -#pragma GCC reset_options \ No newline at end of file +#pragma GCC reset_options diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_2.c b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_2.c index 2e8e385774b..189af170096 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_2.c +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_2.c @@ -8,7 +8,7 @@ extern uint32_t bar(); -__attribute__((target("arch=armv8-a+crc"))) uint32_t crc32cw(uint32_t crc, uint32_t val) +__attribute__((target("arch=armv8-a+simd+crc"))) uint32_t crc32cw(uint32_t crc, uint32_t val) { uint32_t res; asm("crc32cw %0, %1, %2" : "=r"(res) : "r"(crc), "r"(val)); diff --git a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_3.c b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_3.c index 3714812cf26..eb7f990477b 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_3.c +++ b/gcc/testsuite/gcc.target/arm/pragma_arch_attribute_3.c @@ -9,7 +9,7 @@ extern uint32_t bar(); #pragma GCC push_options -#pragma GCC target("arch=armv8-a+crc") +#pragma GCC target("arch=armv8-a+simd+crc") uint32_t crc32cw(uint32_t crc, uint32_t val) { uint32_t res;