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[8.43.85.97]) by mx.google.com with ESMTPS id h2-20020a05620a244200b0076d512665d7si825039qkn.627.2023.11.07.19.48.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 19:48:55 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C087E385773C for ; Wed, 8 Nov 2023 03:48:55 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by sourceware.org (Postfix) with ESMTPS id 57C5D3858035 for ; Wed, 8 Nov 2023 03:48:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 57C5D3858035 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 57C5D3858035 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.207.22.56 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699415288; cv=none; b=rJpqgsq9w9P7dufnu8X6SzhlyceoiW/RDKtXO8+K15F7auPWKYCAz5KCxwa9VTHENkAycYd0/651XtuYtQ/vTpo52c56+iEbpEvFMfsLBTXLoOSx5Pkfj3eUbc76oe8d4DtIS7cu87BN43HY/S/fY/dtDtbfgs2cg3SGoiHWda0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699415288; c=relaxed/simple; bh=pOd5h7ZatzTojX2ZYpnCxGxvgPrGaE+n3qRZiQ8sX+g=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=iR8kI37Ch/45uEJ1tgV5XQPx7KzhwaELsHpBUFD8MpMncz0BRdgb7viB60Ls+HFuQM3K2hgQEiI/egH7gwkA7ZvEEYe6oGGksmZ3q37Z7kAH0Nhby6tGIpmwTE1WRREZVIZCworaVwlCZ+krGFl8Qh6VqOH9pKd5Sw44Vd+xEDQ= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp81t1699415278tgak60kd Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 08 Nov 2023 11:47:58 +0800 (CST) X-QQ-SSF: 01400000000000C0F000000A0000000 X-QQ-FEAT: lm7sZZPcOdbWk/opJUtPOpa091AFp/LA9CWE/YqN+qUf6aYtNAlqYGK9LixjX ftMAD6W4R5vUwG0SCjj5nAPVX0VDdtlTzYX9cZdVKKMucToum03VB1s+rgRDPeGVJz4T57w y5Rjcw4Q/ZNeAUV7Bl0T4LmrqNgEwv49fx8bHuQNDRb9nl4BkDBmFyhRBt5J4cWLqzP9a5B hBiML+0trnwSy0/xVVEJQBzuPcf/ryzLTZvVsdNbl8ZANoc5kHYE89mm8g9V5UMhyokTNWE GpJV9oltG+CVNd2RL2oeyuQmu9aQkwDtsS7PLeKE3ENt8bZAstT2N1qnv8pOgcZ8lWaiXVo gtWNYF77TuAHYlaECnZj5SbW8vVeXXjz8rtECcxKwG3j2YSMXo6UAxRsTHavtXGTc3cVrgy X-QQ-GoodBg: 2 X-BIZMAIL-ID: 2057229749792789861 From: Lehua Ding To: gcc-patches@gcc.gnu.org Cc: vmakarov@redhat.com, richard.sandiford@arm.com, juzhe.zhong@rivai.ai, lehua.ding@rivai.ai Subject: [PATCH 5/7] ira: Add all nregs >= 2 pseudos to tracke subreg list Date: Wed, 8 Nov 2023 11:47:38 +0800 Message-Id: <20231108034740.834590-6-lehua.ding@rivai.ai> X-Mailer: git-send-email 2.36.3 In-Reply-To: <20231108034740.834590-1-lehua.ding@rivai.ai> References: <20231108034740.834590-1-lehua.ding@rivai.ai> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz6a-0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781966135668688062 X-GMAIL-MSGID: 1781966135668688062 This patch completely relax to track all eligible subregs. gcc/ChangeLog: * ira-build.cc (get_reg_unit_size): New. (has_same_nregs): New. (ira_set_allocno_class): Relax. --- gcc/ira-build.cc | 41 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/gcc/ira-build.cc b/gcc/ira-build.cc index 1c47f81ce9d..379f877ca67 100644 --- a/gcc/ira-build.cc +++ b/gcc/ira-build.cc @@ -607,6 +607,37 @@ ira_create_allocno (int regno, bool cap_p, return a; } +/* Return single register size of allocno A. */ +static poly_int64 +get_reg_unit_size (ira_allocno_t a) +{ + enum reg_class aclass = ALLOCNO_CLASS (a); + gcc_assert (aclass != NO_REGS); + machine_mode mode = ALLOCNO_MODE (a); + int nregs = ALLOCNO_NREGS (a); + poly_int64 block_size = REGMODE_NATURAL_SIZE (mode); + int nblocks = get_nblocks (mode); + gcc_assert (nblocks % nregs == 0); + return block_size * (nblocks / nregs); +} + +/* Return true if TARGET_CLASS_MAX_NREGS and TARGET_HARD_REGNO_NREGS results is + same. It should be noted that some targets may not implement these two very + uniformly, and need to be debugged step by step. For example, in V3x1DI mode + in AArch64, TARGET_CLASS_MAX_NREGS returns 2 but TARGET_HARD_REGNO_NREGS + returns 3. They are in conflict and need to be repaired in the Hook of + AArch64. */ +static bool +has_same_nregs (ira_allocno_t a) +{ + for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++) + if (REGNO_REG_CLASS (i) != NO_REGS + && reg_class_subset_p (REGNO_REG_CLASS (i), ALLOCNO_CLASS (a)) + && ALLOCNO_NREGS (a) != hard_regno_nregs (i, ALLOCNO_MODE (a))) + return false; + return true; +} + /* Set up register class for A and update its conflict hard registers. */ void @@ -624,12 +655,12 @@ ira_set_allocno_class (ira_allocno_t a, enum reg_class aclass) if (aclass == NO_REGS) return; - /* SET the unit_size of one register. */ - machine_mode mode = ALLOCNO_MODE (a); - int nregs = ira_reg_class_max_nregs[aclass][mode]; - if (nregs == 2 && maybe_eq (GET_MODE_SIZE (mode), nregs * UNITS_PER_WORD)) + gcc_assert (!ALLOCNO_TRACK_SUBREG_P (a)); + /* Set unit size and track_subreg_p flag for pseudo which need occupied multi + hard regs. */ + if (ALLOCNO_NREGS (a) > 1 && has_same_nregs (a)) { - ALLOCNO_UNIT_SIZE (a) = UNITS_PER_WORD; + ALLOCNO_UNIT_SIZE (a) = get_reg_unit_size (a); ALLOCNO_TRACK_SUBREG_P (a) = true; return; }