From patchwork Tue Nov 7 04:06:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenxiaolong X-Patchwork-Id: 162260 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:aa0b:0:b0:403:3b70:6f57 with SMTP id k11csp673vqo; Mon, 6 Nov 2023 20:06:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IFpSM8VW5Kw4IwJBDTflYXFQYNkJv58cCMkY1Fmp1br1LqETVg0JX1qs8/td8FBeELYMoB3 X-Received: by 2002:a05:622a:13c8:b0:41e:a62b:3d18 with SMTP id p8-20020a05622a13c800b0041ea62b3d18mr12721478qtk.59.1699329997613; Mon, 06 Nov 2023 20:06:37 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1699329997; cv=pass; d=google.com; s=arc-20160816; b=a2rdAdG/gsmwN3lrKQbmGQ7RyDBp7vfPyuucwqjZf7A2bWZQXEUzHQ4xZScNlcyQAt L+HUoBkGBvKkWsx5Q7f0WwRQzG0Qw+d32iFnK6oIC9vd06NxALAYDHhXxnGmMy1HbN04 4Z7BOIbELpKNNKPTqvwWPjjniogoM71mZz53vbhLIvZV1+d9aAwbuAuUQlg0dIV0jrSR vsQSxysX98B9BztAEdSoK2HLN31OV0p0fNK3Y6tkn8rJXLPq39nLd7xKKpn2JI6EUEWf n2zYB5aSogWVt+pDil8ToAEQoJc2nhqvvexGmGAtNmkzHDz+28v3Leu007WxZ6Mx9yHS 3JOA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:arc-filter :dmarc-filter:delivered-to; bh=zLlL9FkSVVOTcRr/DjK8TBylAVi/5sS/YrbdaGY5oFQ=; fh=FZUwle8+72fCZy+/zioADwckSVaPYtJTkTncWlIM74g=; b=UW0rSm0cbeI2e4jTRH9c1V3ShTMi9o9QFxF6WpFZ7NH6HfBFLeZ/5t70L1L7de4ES8 r8LqpHjQix9CFC2p9hH3B6NwRtaYJex8yIaM+ZjU1DC9b3cECidUHsl1+Zo73gd0rsob HqJnaf9brcG90EnvoNvbFLyVM33ei2PEjCKluFk8ORGv6cA449yUGRnJFw/qSC1h6u5z bX4cjVkS7ML2pA0cdaRWIxYQtoAnV2X415emFS26vqVX8wWstFGWJ8lTP7Ka6GtzgXl9 pfEm8ICI09hyVn4seJs5rhNb0eErl1uRUwSBP4ykdxM0wStdCVVhwBBY5ZYS/Q2CulPn TV3A== ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id t13-20020a05622a180d00b004181e1d50f9si6758971qtc.549.2023.11.06.20.06.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 20:06:37 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 29B493858404 for ; Tue, 7 Nov 2023 04:06:37 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id D15583858D1E for ; Tue, 7 Nov 2023 04:06:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D15583858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D15583858D1E Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699329974; cv=none; b=q+oysim+hNcQV8TTsHOpKcmZCog4rYf/7dvSxK3mFwl9umEEFdfvcEF6KSpInudtvx7emAWv8r7kxaN16UXyA+N3utUMJff+gGFDbJjWMwUptnCZUOp6XmPRrj+bSmofPfXDINGF+NpNVOcNSoMdJUcReS04iwJUvQnRUSaIJDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699329974; c=relaxed/simple; bh=ubTeQrkkE3lLVqqjDkAlOLZ5MxOu0NAHSgFzGpNE1lc=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=ZJleA9Uuc1UCGMYn9isXoiQDx6XspwX5xxuWRp26pQcF0XGRHbKETuXEncMxUvbn1Fu5xnZTFX7yThmhSSUpdiH11dOC93YxZYvz1LsljM3heKwqRA+orLB+HIvPBz+iblyZ6ehz+K3b9Ik41Z+PDoKpj/S2xd3u0XW42+rZDVI= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.10.130.252]) by gateway (Coremail) with SMTP id _____8CxLOuwt0llfI43AA--.38078S3; Tue, 07 Nov 2023 12:06:09 +0800 (CST) Received: from slurm-master.loongson.cn (unknown [10.10.130.252]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxjd6wt0llu9Q6AA--.65104S4; Tue, 07 Nov 2023 12:06:08 +0800 (CST) From: chenxiaolong To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn, chenxiaolong Subject: [PATCH v1] LoongArch: Add modifiers for lsx and lasx. Date: Tue, 7 Nov 2023 12:06:06 +0800 Message-Id: <20231107040606.332-1-chenxiaolong@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxjd6wt0llu9Q6AA--.65104S4 X-CM-SenderInfo: hfkh05xldrz0tqj6z05rqj20fqof0/1tbiAQAIBWVJnqkEPAAAsv X-Coremail-Antispam: 1Uk129KBj93XoW7Kw17ZFWfKFyDKFW8KrWUZFc_yoW8ur4kpa nFk3yYqr1kCanruw1fAw4xuFnxJryxtw4UGrW3t34qkr43KFyIqF4IyFy29w1kA3WS9rW7 tr42q348C3W5A3gCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r126r1DMcIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07UMpBfUUUUU= X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781876651751369242 X-GMAIL-MSGID: 1781876651751369242 gcc/ChangeLog: * doc/extend.texi:Added modifiers for LoongArch architecture lsx and lasx in the manual. --- gcc/doc/extend.texi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 6e2f5b5a58c..d42c3ca49ef 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10582,6 +10582,31 @@ __asm__ ("btsl %2,%1\n\t" // Turn on zero-based bit #Offset in Base. return old; @end example +In this LoongArch example, c (referred to in the template string as %0) is the +output,and a (%1) and b (%2) are the inputs.Where the symbol "=f" refers to the +use of a floating-point register as a constraint for the output type, and the +"f" in the input operand refers to the use of a floating-point register operand, +the constraint can refer to the definition of constraints in gcc. + +This is a 128-bit double-byte vector addition instruction,the instruction +modifier (w) represents the 128-bit vector instruction modification format,its +corresponding output instructions are @code{"vadd.d $vr0,$vr0,$vr1"}. + +On the @code{LoongArch} architecture, the operand can only output the +corresponding vector (SX/ASX) instruction if it uses @code{'w}' and @code{'u'} +in the assembly instruction,with @code{'f'} as the constraint character. + +@example +__m128i a,b,c; + +__asm__ ("vadd.d %w0,%w1,%w2\n\t" + :"=f" (c) + :"f" (a),"f" (b) + :"cc"); + +return c; +@end example + Operands are separated by commas. Each operand has this format: @example @@ -11680,6 +11705,8 @@ The list below describes the supported modifiers and their effects for LoongArch @item @code{m} @tab Same as @code{c}, but the printed value is @code{operand - 1}. @item @code{X} @tab Print a constant integer operand in hexadecimal. @item @code{z} @tab Print the operand in its unmodified form, followed by a comma. +@item @code{u} @tab Print a LASX register. +@item @code{w} @tab Print a LSX register. @end multitable @anchor{riscvOperandmodifiers}