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[8.43.85.97]) by mx.google.com with ESMTPS id bl9-20020a05620a1a8900b007740257b80esi4945714qkb.311.2023.10.15.23.27.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Oct 2023 23:27:11 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bZn+bZCs; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F3A623857B9B for ; Mon, 16 Oct 2023 06:27:10 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by sourceware.org (Postfix) with ESMTPS id 4B6313858C3A for ; Mon, 16 Oct 2023 06:25:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4B6313858C3A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4B6313858C3A Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.55.52.88 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697437551; cv=none; b=kooTn5gol2a54n2erWl56wIaCAcJgAtYSlvabR0mGNaKlgh17J+DZKChNh6etrKq+rKVVKE+TzicZVUOf7riLrlACBi62+hJI0+PMMsV8J0aJTXNkMQJblZCAAqMvc2YNiHvV4rBMY5rOad72xjYaWuTbivOGK30T+oCmsDEgik= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697437551; c=relaxed/simple; bh=XZphhNIRZ2XDseahhiiRNYHS+1aHa93DD2rgZ1kzTpE=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=W89NomGhOav28ycb5O+01+pOAepblkHBrZKNCyAd48Z5g4FZfkNvtrjlMSwYcoj/m/VLGRN8ViubTxs2KNfzJ8ybFPNjISc9+5ab3bZofeOjmhxxBqwhGCHjQ49Zw4Gsl7QvBWxHDbbIWMLY9HgaPkPuX2vAl+yuIiW9QnbSVJU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697437549; x=1728973549; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XZphhNIRZ2XDseahhiiRNYHS+1aHa93DD2rgZ1kzTpE=; b=bZn+bZCs+eSPfsg5NuAKTvogIMORZR0YwrxlxFQED+XCvJR7A7pjMsS/ I3xqdvG51kniefcS69bJkFXUzDt3B6n59Y0G3IBJRKII0DlHllrJ/OOTc zdzl7tRffJ72eKneDZaeJxp7rbOzsC5YPlPCQ/LzWY2ZYlAh3IQIahC3z IueRogxzAYsSujdb304FKC+C3H2H71Hx4JdE1/3jCwxOqnUEaCuh9vdIE Nqn1AFql4qM/uz8FanDIKP2vjfIGSlQ7H4vtjbfp67wWY31FKduubd27G 6JAvcxVf57Xmv3+wh3m9C5Kpr8JTBoko/OLUuX96yYWho5yVAqd/c4fIi g==; X-IronPort-AV: E=McAfee;i="6600,9927,10863"; a="416523708" X-IronPort-AV: E=Sophos;i="6.03,228,1694761200"; d="scan'208";a="416523708" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2023 23:25:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10863"; a="705483466" X-IronPort-AV: E=Sophos;i="6.03,228,1694761200"; d="scan'208";a="705483466" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga003.jf.intel.com with ESMTP; 15 Oct 2023 23:25:44 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 1EC651005686; Mon, 16 Oct 2023 14:25:43 +0800 (CST) From: Haochen Jiang To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH 3/3] Initial Panther Lake Support Date: Mon, 16 Oct 2023 14:23:40 +0800 Message-Id: <20231016062340.2639697-4-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20231016062340.2639697-1-haochen.jiang@intel.com> References: <20231016062340.2639697-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779892361863758073 X-GMAIL-MSGID: 1779892361863758073 gcc/ChangeLog: * common/config/i386/i386-common.cc (processor_name): Add Panther Lake. (processor_alias_table): Ditto. * common/config/i386/i386-cpuinfo.h (enum processor_types): Add INTEL_PANTHERLAKE. * config.gcc: Add -march=pantherlake. * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor the if clause. Handle pantherlake. * config/i386/i386-c.cc (ix86_target_macros_internal): Handle pantherlake. * config/i386/i386-options.cc (processor_cost_table): Ditto. (m_PANTHERLAKE): New. (m_CORE_HYBRID): Add pantherlake. * config/i386/i386.h (enum processor_type): Ditto. * doc/extend.texi: Ditto. * doc/invoke.texi: Ditto. gcc/testsuite/ChangeLog: * g++.target/i386/mv16.C: Ditto. * gcc.target/i386/funcspec-56.inc: Handle new march. --- gcc/common/config/i386/cpuinfo.h | 8 ++ gcc/common/config/i386/i386-common.cc | 3 + gcc/common/config/i386/i386-cpuinfo.h | 1 + gcc/config.gcc | 2 +- gcc/config/i386/driver-i386.cc | 92 ++++++++++--------- gcc/config/i386/i386-c.cc | 7 ++ gcc/config/i386/i386-options.cc | 5 +- gcc/config/i386/i386.h | 2 + gcc/doc/extend.texi | 3 + gcc/doc/invoke.texi | 9 ++ gcc/testsuite/g++.target/i386/mv16.C | 6 ++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 + 12 files changed, 94 insertions(+), 45 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 57394a18c67..f7060ed7254 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -614,6 +614,14 @@ get_intel_cpu (struct __processor_model *cpu_model, CHECK___builtin_cpu_is ("clearwaterforest"); cpu_model->__cpu_type = INTEL_CLEARWATERFOREST; break; + case 0xcc: + /* Panther Lake. */ + cpu = "pantherlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("pantherlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_PANTHERLAKE; + break; case 0x17: case 0x1d: /* Penryn. */ diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index 903034d2afd..79b1b35ad6c 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2095,6 +2095,7 @@ const char *const processor_names[] = "graniterapids-d", "arrowlake", "arrowlake-s", + "pantherlake", "intel", "lujiazui", "geode", @@ -2227,6 +2228,8 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2}, {"lunarlake", PROCESSOR_ARROWLAKE_S, CPU_HASWELL, PTA_ARROWLAKE_S, M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2}, + {"pantherlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE, + M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 44db6a07076..533b7481c16 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -102,6 +102,7 @@ enum processor_subtypes INTEL_COREI7_GRANITERAPIDS_D, INTEL_COREI7_ARROWLAKE, INTEL_COREI7_ARROWLAKE_S, + INTEL_COREI7_PANTHERLAKE, CPU_SUBTYPE_MAX }; diff --git a/gcc/config.gcc b/gcc/config.gcc index 2d045d6d00f..37311fcd075 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -708,7 +708,7 @@ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \ sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \ nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \ sierraforest graniterapids graniterapids-d grandridge arrowlake arrowlake-s \ -clearwaterforest native" +clearwaterforest pantherlake native" # Additional x86 processors supported by --with-cpu=. Each processor # MUST be separated by exactly one space. diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc index a21f2dfe82f..2b4d6afe8db 100644 --- a/gcc/config/i386/driver-i386.cc +++ b/gcc/config/i386/driver-i386.cc @@ -589,26 +589,14 @@ const char *host_detect_local_cpu (int argc, const char **argv) if (arch) { /* This is unknown family 0x6 CPU. */ - if (has_feature (FEATURE_AVX)) + if (has_feature (FEATURE_AVX512F)) { - /* Assume Clear Water Forest. */ - if (has_feature (FEATURE_USER_MSR)) - cpu = "clearwaterforest"; - /* Assume Arrow Lake S. */ - else if (has_feature (FEATURE_SM3)) - cpu = "arrowlake-s"; - /* Assume Grand Ridge. */ - else if (has_feature (FEATURE_RAOINT)) - cpu = "grandridge"; /* Assume Granite Rapids D. */ - else if (has_feature (FEATURE_AMX_COMPLEX)) + if (has_feature (FEATURE_AMX_COMPLEX)) cpu = "graniterapids-d"; /* Assume Granite Rapids. */ else if (has_feature (FEATURE_AMX_FP16)) cpu = "graniterapids"; - /* Assume Sierra Forest. */ - else if (has_feature (FEATURE_AVXVNNIINT8)) - cpu = "sierraforest"; /* Assume Tiger Lake */ else if (has_feature (FEATURE_AVX512VP2INTERSECT)) cpu = "tigerlake"; @@ -621,36 +609,54 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Assume Ice Lake Server. */ else if (has_feature (FEATURE_WBNOINVD)) cpu = "icelake-server"; - /* Assume Ice Lake. */ - else if (has_feature (FEATURE_AVX512BITALG)) - cpu = "icelake-client"; - /* Assume Cannon Lake. */ - else if (has_feature (FEATURE_AVX512VBMI)) - cpu = "cannonlake"; - /* Assume Knights Mill. */ - else if (has_feature (FEATURE_AVX5124VNNIW)) - cpu = "knm"; - /* Assume Knights Landing. */ - else if (has_feature (FEATURE_AVX512ER)) - cpu = "knl"; - /* Assume Skylake with AVX-512. */ - else if (has_feature (FEATURE_AVX512F)) - cpu = "skylake-avx512"; - /* Assume Alder Lake */ - else if (has_feature (FEATURE_SERIALIZE)) + /* Assume Ice Lake. */ + else if (has_feature (FEATURE_AVX512BITALG)) + cpu = "icelake-client"; + /* Assume Cannon Lake. */ + else if (has_feature (FEATURE_AVX512VBMI)) + cpu = "cannonlake"; + /* Assume Knights Mill. */ + else if (has_feature (FEATURE_AVX5124VNNIW)) + cpu = "knm"; + /* Assume Knights Landing. */ + else if (has_feature (FEATURE_AVX512ER)) + cpu = "knl"; + /* Assume Skylake with AVX-512. */ + else + cpu = "skylake-avx512"; + } + else if (has_feature (FEATURE_AVX)) + { + /* Assume Panther Lake. */ + if (has_feature (FEATURE_PREFETCHI)) + cpu = "pantherlake"; + /* Assume Clear Water Forest. */ + if (has_feature (FEATURE_USER_MSR)) + cpu = "clearwaterforest"; + /* Assume Arrow Lake S. */ + else if (has_feature (FEATURE_SM3)) + cpu = "arrowlake-s"; + /* Assume Grand Ridge. */ + else if (has_feature (FEATURE_RAOINT)) + cpu = "grandridge"; + /* Assume Sierra Forest. */ + else if (has_feature (FEATURE_AVXVNNIINT8)) + cpu = "sierraforest"; + /* Assume Alder Lake. */ + else if (has_feature (FEATURE_SERIALIZE)) cpu = "alderlake"; - /* Assume Skylake. */ - else if (has_feature (FEATURE_CLFLUSHOPT)) - cpu = "skylake"; - /* Assume Broadwell. */ - else if (has_feature (FEATURE_ADX)) - cpu = "broadwell"; - else if (has_feature (FEATURE_AVX2)) - /* Assume Haswell. */ - cpu = "haswell"; - else - /* Assume Sandy Bridge. */ - cpu = "sandybridge"; + /* Assume Skylake. */ + else if (has_feature (FEATURE_CLFLUSHOPT)) + cpu = "skylake"; + /* Assume Broadwell. */ + else if (has_feature (FEATURE_ADX)) + cpu = "broadwell"; + /* Assume Haswell. */ + else if (has_feature (FEATURE_AVX2)) + cpu = "haswell"; + /* Assume Sandy Bridge. */ + else + cpu = "sandybridge"; } else if (has_feature (FEATURE_SSE4_2)) { diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc index 7ac95a923be..ebe6a63ed41 100644 --- a/gcc/config/i386/i386-c.cc +++ b/gcc/config/i386/i386-c.cc @@ -282,6 +282,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__arrowlake_s"); def_or_undef (parse_in, "__arrowlake_s__"); break; + case PROCESSOR_PANTHERLAKE: + def_or_undef (parse_in, "__pantherlake"); + def_or_undef (parse_in, "__pantherlake__"); + break; /* use PROCESSOR_max to not set/unset the arch macro. */ case PROCESSOR_max: @@ -476,6 +480,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_ARROWLAKE_S: def_or_undef (parse_in, "__tune_arrowlake_s__"); break; + case PROCESSOR_PANTHERLAKE: + def_or_undef (parse_in, "__tune_pantherlake__"); + break; case PROCESSOR_INTEL: case PROCESSOR_GENERIC: break; diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 952cfe54da0..3a03de5ceca 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -142,8 +142,10 @@ along with GCC; see the file COPYING3. If not see #define m_ARROWLAKE (HOST_WIDE_INT_1U<