@@ -608,6 +608,12 @@ get_intel_cpu (struct __processor_model *cpu_model,
cpu_model->__cpu_type = INTEL_COREI7;
cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE_S;
break;
+ case 0xdd:
+ /* Clear Water Forest. */
+ cpu = "clearwaterforest";
+ CHECK___builtin_cpu_is ("clearwaterforest");
+ cpu_model->__cpu_type = INTEL_CLEARWATERFOREST;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
@@ -2077,6 +2077,7 @@ const char *const processor_names[] =
"tremont",
"sierraforest",
"grandridge",
+ "clearwaterforest",
"knl",
"knm",
"skylake",
@@ -2246,6 +2247,8 @@ const pta processor_alias_table[] =
M_CPU_SUBTYPE (INTEL_SIERRAFOREST), P_PROC_AVX2},
{"grandridge", PROCESSOR_GRANDRIDGE, CPU_HASWELL, PTA_GRANDRIDGE,
M_CPU_TYPE (INTEL_GRANDRIDGE), P_PROC_AVX2},
+ {"clearwaterforest", PROCESSOR_CLEARWATERFOREST, CPU_HASWELL,
+ PTA_CLEARWATERFOREST, M_CPU_TYPE (INTEL_CLEARWATERFOREST), P_PROC_AVX2},
{"knl", PROCESSOR_KNL, CPU_SLM, PTA_KNL,
M_CPU_TYPE (INTEL_KNL), P_PROC_AVX512F},
{"knm", PROCESSOR_KNM, CPU_SLM, PTA_KNM,
@@ -62,6 +62,7 @@ enum processor_types
ZHAOXIN_FAM7H,
INTEL_SIERRAFOREST,
INTEL_GRANDRIDGE,
+ INTEL_CLEARWATERFOREST,
CPU_TYPE_MAX,
BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX
};
@@ -708,7 +708,7 @@ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \
sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \
nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \
sierraforest graniterapids graniterapids-d grandridge arrowlake arrowlake-s \
-native"
+clearwaterforest native"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
@@ -591,8 +591,11 @@ const char *host_detect_local_cpu (int argc, const char **argv)
/* This is unknown family 0x6 CPU. */
if (has_feature (FEATURE_AVX))
{
+ /* Assume Clear Water Forest. */
+ if (has_feature (FEATURE_USER_MSR))
+ cpu = "clearwaterforest";
/* Assume Arrow Lake S. */
- if (has_feature (FEATURE_SM3))
+ else if (has_feature (FEATURE_SM3))
cpu = "arrowlake-s";
/* Assume Grand Ridge. */
else if (has_feature (FEATURE_RAOINT))
@@ -210,6 +210,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__grandridge");
def_or_undef (parse_in, "__grandridge__");
break;
+ case PROCESSOR_CLEARWATERFOREST:
+ def_or_undef (parse_in, "__clearwaterforest");
+ def_or_undef (parse_in, "__clearwaterforest__");
+ break;
case PROCESSOR_KNL:
def_or_undef (parse_in, "__knl");
def_or_undef (parse_in, "__knl__");
@@ -415,6 +419,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_GRANDRIDGE:
def_or_undef (parse_in, "__tune_grandridge__");
break;
+ case PROCESSOR_CLEARWATERFOREST:
+ def_or_undef (parse_in, "__tune_clearwaterforest__");
+ break;
case PROCESSOR_KNL:
def_or_undef (parse_in, "__tune_knl__");
break;
@@ -141,7 +141,8 @@ along with GCC; see the file COPYING3. If not see
#define m_GRANDRIDGE (HOST_WIDE_INT_1U<<PROCESSOR_GRANDRIDGE)
#define m_ARROWLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE)
#define m_ARROWLAKE_S (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE_S)
-#define m_CORE_ATOM (m_SIERRAFOREST | m_GRANDRIDGE)
+#define m_CLEARWATERFOREST (HOST_WIDE_INT_1U<<PROCESSOR_CLEARWATERFOREST)
+#define m_CORE_ATOM (m_SIERRAFOREST | m_GRANDRIDGE | m_CLEARWATERFOREST)
#define m_INTEL (HOST_WIDE_INT_1U<<PROCESSOR_INTEL)
/* Gather Data Sampling / CVE-2022-40982 / INTEL-SA-00828.
Software mitigation. */
@@ -767,6 +768,7 @@ static const struct processor_costs *processor_cost_table[] =
&tremont_cost,
&alderlake_cost,
&alderlake_cost,
+ &alderlake_cost,
&slm_cost,
&slm_cost,
&skylake_cost,
@@ -2268,6 +2268,7 @@ enum processor_type
PROCESSOR_TREMONT,
PROCESSOR_SIERRAFOREST,
PROCESSOR_GRANDRIDGE,
+ PROCESSOR_CLEARWATERFOREST,
PROCESSOR_KNL,
PROCESSOR_KNM,
PROCESSOR_SKYLAKE,
@@ -2402,6 +2403,8 @@ constexpr wide_int_bitmask PTA_GRANDRIDGE = PTA_SIERRAFOREST | PTA_RAOINT;
constexpr wide_int_bitmask PTA_ARROWLAKE = PTA_SIERRAFOREST;
constexpr wide_int_bitmask PTA_ARROWLAKE_S = PTA_ARROWLAKE | PTA_AVXVNNIINT16
| PTA_SHA512 | PTA_SM3 | PTA_SM4;
+constexpr wide_int_bitmask PTA_CLEARWATERFOREST = PTA_ARROWLAKE_S | PTA_PREFETCHI
+ | PTA_USER_MSR;
constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
| PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2
@@ -22636,6 +22636,9 @@ Intel Core i7 Arrow Lake CPU.
@item arrowlake-s
Intel Core i7 Arrow Lake S CPU.
+@item clearwaterforest
+Intel Atom Clear Water Forest CPU.
+
@item knl
Intel Knights Landing CPU.
@@ -32842,6 +32842,15 @@ PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3
and SM4 instruction set support.
+@item clearwaterforest
+Intel Clear Water Forest CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
+SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE,
+XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB,
+MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA,
+LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL, AVX-VNNI,
+AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4,
+USER_MSR and PREFETCHI instruction set support.
+
@item knl
Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
@@ -116,6 +116,10 @@ int __attribute__ ((target("arch=arrowlake-s"))) foo () {
return 30;
}
+int __attribute__ ((target("arch=clearwaterforest"))) foo () {
+ return 31;
+}
+
int main ()
{
int val = foo ();
@@ -166,6 +170,8 @@ int main ()
assert (val == 29);
else if (__builtin_cpu_is ("arrowlake-s"))
assert (val == 30);
+ else if (__builtin_cpu_is ("clearwaterforest"))
+ assert (val == 31);
else
assert (val == 0);
@@ -216,6 +216,7 @@ extern void test_arch_graniterapids (void) __attribute__((__target__("arch=grani
extern void test_arch_graniterapids_d (void) __attribute__((__target__("arch=graniterapids-d")));
extern void test_arch_arrowlake (void) __attribute__((__target__("arch=arrowlake")));
extern void test_arch_arrowlake_s (void) __attribute__((__target__("arch=arrowlake-s")));
+extern void test_arch_clearwaterforest (void) __attribute__((__target__("arch=clearwaterforest")));
extern void test_arch_lujiazui (void) __attribute__((__target__("arch=lujiazui")));
extern void test_arch_k8 (void) __attribute__((__target__("arch=k8")));
extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3")));