diff mbox series

[committed] arc: Refurbish add.f combiner patterns

Message ID 20231010083950.1549239-1-claziss@gmail.com
State Accepted
Headers
Series [committed] arc: Refurbish add.f combiner patterns |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Claudiu Zissulescu Ianculescu Oct. 10, 2023, 8:39 a.m. UTC 
  Refurbish add compare patterns: use 'r' constraint, fix identation,
and fix pattern to match 'if (a+b) { ... }' constructions.

gcc/

	* config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
	the first operand.
	* config/arc/arc.md (addsi_compare): Make pattern canonical.
	(addsi_compare_2): Fix identation, constraint letters.
	(addsi_compare_3): Likewise.

gcc/testsuite/

	* gcc.target/arc/add_f-combine.c: New test.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
---
 gcc/config/arc/arc.cc                        |  2 +-
 gcc/config/arc/arc.md                        | 25 ++++++++++----------
 gcc/testsuite/gcc.target/arc/add_f-combine.c | 15 ++++++++++++
 3 files changed, 28 insertions(+), 14 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arc/add_f-combine.c
diff mbox series

Patch

diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc
index ecc681cff61..00427d859cc 100644
--- a/gcc/config/arc/arc.cc
+++ b/gcc/config/arc/arc.cc
@@ -1562,7 +1562,7 @@  arc_select_cc_mode (enum rtx_code op, rtx x, rtx y)
 
   /* add.f for if (a+b) */
   if (mode == SImode
-      && GET_CODE (y) == NEG
+      && GET_CODE (x) == NEG
       && (op == EQ || op == NE))
     return CC_ZNmode;
 
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index cedb9517bb0..a936a8be53d 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1102,34 +1102,33 @@  (define_insn "*commutative_binary_cmp0"
 ; the combiner needs this pattern
 (define_insn "*addsi_compare"
   [(set (reg:CC_ZN CC_REG)
-	(compare:CC_ZN (match_operand:SI 0 "register_operand" "c")
-		       (neg:SI (match_operand:SI 1 "register_operand" "c"))))]
+	(compare:CC_ZN (neg:SI
+			(match_operand:SI 0 "register_operand" "r"))
+		       (match_operand:SI 1 "register_operand"  "r")))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4")])
 
-; for flag setting 'add' instructions like if (a+b < a) { ...}
-; the combiner needs this pattern
 (define_insn "addsi_compare_2"
   [(set (reg:CC_C CC_REG)
-	(compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "c,c")
-			       (match_operand:SI 1 "nonmemory_operand" "cL,Cal"))
-		      (match_dup 0)))]
+       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand"   "r,r")
+                              (match_operand:SI 1 "nonmemory_operand" "rL,Cal"))
+                     (match_dup 0)))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4,8")])
 
 (define_insn "*addsi_compare_3"
   [(set (reg:CC_C CC_REG)
-	(compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "c")
-			       (match_operand:SI 1 "register_operand" "c"))
-		      (match_dup 1)))]
+       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "r")
+                              (match_operand:SI 1 "register_operand" "r"))
+                     (match_dup 1)))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4")])
diff --git a/gcc/testsuite/gcc.target/arc/add_f-combine.c b/gcc/testsuite/gcc.target/arc/add_f-combine.c
new file mode 100644
index 00000000000..cfa3676f7da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/add_f-combine.c
@@ -0,0 +1,15 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+/* Check if combiner is matching add.f patterns.  */
+
+int a1 (int a, int b)
+{
+  if (a + b)
+    {
+      return 1;
+    }
+  return a + 2;
+}
+
+/* { dg-final { scan-assembler "add.f\\s+0,r\\d+,r\\d+" } } */