diff mbox series

RISC-V Regression: Fix dump check of bb-slp-68.c

Message ID 20231010011638.103019-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V Regression: Fix dump check of bb-slp-68.c |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Oct. 10, 2023, 1:16 a.m. UTC 
  Like GCN, RVV also has 64 bytes vectors (512 bits) which cause FAIL in this test.

It's more reasonable to use "vect512" instead of AMDGCN.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/bb-slp-68.c: Use vect512.

---
 gcc/testsuite/gcc.dg/vect/bb-slp-68.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jeff Law Oct. 10, 2023, 1:44 p.m. UTC | #1 
On 10/9/23 19:16, Juzhe-Zhong wrote:
> Like GCN, RVV also has 64 bytes vectors (512 bits) which cause FAIL in this test.
> 
> It's more reasonable to use "vect512" instead of AMDGCN.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.dg/vect/bb-slp-68.c: Use vect512.
Just a note for the record.  At this time the only target obviously 
advertising 512 bit vectors in available_vector_sizes is amdgcn -- 
avx512 doesn't signal 512 bit vectors right now.  SVE might, but it's a 
bit hard to tell easily and I don't have a cross handy.  I'd hazard a 
guess it would via -msve-vector-bits.

Anyway, OK for the trunk.  Just keep an eye out for reports of any 
issues with this test on aarch64.

Thanks,
Jeff
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-68.c b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
index e7573a14933..2dd3d8ee90c 100644
--- a/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
+++ b/gcc/testsuite/gcc.dg/vect/bb-slp-68.c
@@ -20,4 +20,4 @@  void foo ()
 
 /* We want to have the store group split into 4, 2, 4 when using 32byte vectors.
    Unfortunately it does not work when 64-byte vectors are available.  */
-/* { dg-final { scan-tree-dump-not "from scalars" "slp2" { xfail amdgcn-*-* } } } */
+/* { dg-final { scan-tree-dump-not "from scalars" "slp2" { xfail vect512 } } } */