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[8.43.85.97]) by mx.google.com with ESMTPS id q22-20020a170906361600b0099304c10fd0si805901ejb.991.2023.09.21.00.28.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Sep 2023 00:28:56 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ROfteOMk; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CEECB3893669 for ; Thu, 21 Sep 2023 07:24:16 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 5CDE63857714 for ; Thu, 21 Sep 2023 07:22:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5CDE63857714 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695280957; x=1726816957; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CLDeXvQkWmf6bR9OSS8ae1zV1STIEYnRRFgpmny5pk4=; b=ROfteOMkp9oA3tUcDYO52U+u7YoBRgGhbq9LuM1YElW/4tgi4Nx57v9p m+86sdIcgMCHYc884sP9IQo6SDG6uO2LVaExYprpoWcIzIxhfIqHHUHl7 bTSVhgqR4VZDo7SblTxLjcQVLi6hzA1CSF446h+lTtpRJn/lEtN6EvVF2 5WRSAIOQmkLmDf3K9r8NliAX9++P9veuZL5nUmj8ufJivjtMvXvvgXlwr xJt3TfUSLKJKUOuNtsU1lrygksDou9g4+77zFIy2EHfes3cgr5Ncg5xcu kfJr+G9vZyluvowJbprNI0RLILFWq2kP0z1tzMbzda7FXRL156Vqz31xk g==; X-IronPort-AV: E=McAfee;i="6600,9927,10839"; a="380352161" X-IronPort-AV: E=Sophos;i="6.03,164,1694761200"; d="scan'208";a="380352161" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2023 00:22:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10839"; a="817262193" X-IronPort-AV: E=Sophos;i="6.03,164,1694761200"; d="scan'208";a="817262193" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 21 Sep 2023 00:22:17 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 690631005142; Thu, 21 Sep 2023 15:22:14 +0800 (CST) From: "Hu, Lin1" To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com, haochen.jiang@intel.com Subject: [PATCH 17/18] Support -mevex512 for AVX512FP16 intrins Date: Thu, 21 Sep 2023 15:20:12 +0800 Message-Id: <20230921072013.2124750-18-lin1.hu@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230921072013.2124750-1-lin1.hu@intel.com> References: <20230921072013.2124750-1-lin1.hu@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777631322914258151 X-GMAIL-MSGID: 1777631322914258151 From: Haochen Jiang gcc/ChangeLog: * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512. (VFH): Ditto. (VF2H): Ditto. (VFH_AVX512VL): Ditto. (VHFBF): Ditto. (VHF_AVX512VL): Ditto. (VI2H_AVX512VL): Ditto. (VI2F_256_512): Ditto. (VF48_I1248): Remove unused iterator. (VF48H_AVX512VL): Add TARGET_EVEX512. (VF_AVX512): Remove unused iterator. (REDUC_PLUS_MODE): Add TARGET_EVEX512. (REDUC_SMINMAX_MODE): Ditto. (FMAMODEM): Ditto. (VFH_SF_AVX512VL): Ditto. (VEC_PERM_AVX2): Ditto. Co-authored-by: Hu, Lin1 --- gcc/config/i386/sse.md | 44 ++++++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index a5a95b9de66..25d53e15dce 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -280,7 +280,7 @@ (define_mode_iterator V48H_AVX512VL [(V16SI "TARGET_EVEX512") (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL") (V8DI "TARGET_EVEX512") (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL") - (V32HF "TARGET_AVX512FP16") + (V32HF "TARGET_AVX512FP16 && TARGET_EVEX512") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL") @@ -355,7 +355,7 @@ (V2DF "TARGET_AVX512DQ && TARGET_AVX512VL")]) (define_mode_iterator VFH - [(V32HF "TARGET_AVX512FP16") + [(V32HF "TARGET_AVX512FP16 && TARGET_EVEX512") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V16SF "TARGET_AVX512F && TARGET_EVEX512") (V8SF "TARGET_AVX") V4SF @@ -401,7 +401,7 @@ ;; All DFmode & HFmode vector float modes (define_mode_iterator VF2H - [(V32HF "TARGET_AVX512FP16") + [(V32HF "TARGET_AVX512FP16 && TARGET_EVEX512") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8DF "TARGET_AVX512F && TARGET_EVEX512") (V4DF "TARGET_AVX") V2DF]) @@ -463,7 +463,7 @@ [(V16SF "TARGET_AVX512ER") (V8SF "TARGET_AVX") V4SF]) (define_mode_iterator VFH_AVX512VL - [(V32HF "TARGET_AVX512FP16") + [(V32HF "TARGET_AVX512FP16 && TARGET_EVEX512") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL") @@ -475,12 +475,14 @@ (define_mode_iterator VF1_AVX512VL [(V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")]) -(define_mode_iterator VHFBF [V32HF V16HF V8HF V32BF V16BF V8BF]) +(define_mode_iterator VHFBF + [(V32HF "TARGET_EVEX512") V16HF V8HF + (V32BF "TARGET_EVEX512") V16BF V8BF]) (define_mode_iterator VHFBF_256 [V16HF V16BF]) (define_mode_iterator VHFBF_128 [V8HF V8BF]) (define_mode_iterator VHF_AVX512VL - [V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")]) + [(V32HF "TARGET_EVEX512") (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")]) (define_mode_iterator VHFBF_AVX512VL [(V32HF "TARGET_EVEX512") (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL") @@ -594,9 +596,9 @@ (V8BF "TARGET_AVX512VL") (V16BF "TARGET_AVX512VL") (V32BF "TARGET_EVEX512")]) (define_mode_iterator VI2H_AVX512VL - [(V8HI "TARGET_AVX512VL") (V16HI "TARGET_AVX512VL") V32HI - (V8SI "TARGET_AVX512VL") V16SI - V8DI ]) + [(V8HI "TARGET_AVX512VL") (V16HI "TARGET_AVX512VL") (V32HI "TARGET_EVEX512") + (V8SI "TARGET_AVX512VL") (V16SI "TARGET_EVEX512") + (V8DI "TARGET_EVEX512")]) (define_mode_iterator VI1_AVX512VL_F [V32QI (V16QI "TARGET_AVX512VL") (V64QI "TARGET_AVX512F && TARGET_EVEX512")]) @@ -883,7 +885,10 @@ (V32BF "TARGET_AVX512BW && TARGET_EVEX512")]) ;; Int-float size matches -(define_mode_iterator VI2F_256_512 [V16HI V32HI V16HF V32HF V16BF V32BF]) +(define_mode_iterator VI2F_256_512 + [V16HI (V32HI "TARGET_EVEX512") + V16HF (V32HF "TARGET_EVEX512") + V16BF (V32BF "TARGET_EVEX512")]) (define_mode_iterator VI4F_128 [V4SI V4SF]) (define_mode_iterator VI8F_128 [V2DI V2DF]) (define_mode_iterator VI4F_256 [V8SI V8SF]) @@ -899,10 +904,8 @@ (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V8DF "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")]) -(define_mode_iterator VF48_I1248 - [V16SI V16SF V8DI V8DF V32HI V64QI]) (define_mode_iterator VF48H_AVX512VL - [V8DF V16SF (V8SF "TARGET_AVX512VL")]) + [(V8DF "TARGET_EVEX512") (V16SF "TARGET_EVEX512") (V8SF "TARGET_AVX512VL")]) (define_mode_iterator VF48_128 [V2DF V4SF]) @@ -928,11 +931,6 @@ (define_mode_iterator VI48F_256 [V8SI V8SF V4DI V4DF]) -(define_mode_iterator VF_AVX512 - [(V4SF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL") - (V8SF "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL") - V16SF V8DF]) - (define_mode_iterator V8_128 [V8HI V8HF V8BF]) (define_mode_iterator V16_256 [V16HI V16HF V16BF]) (define_mode_iterator V32_512 @@ -3419,7 +3417,7 @@ (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8DF "TARGET_AVX512F && TARGET_EVEX512") (V16SF "TARGET_AVX512F && TARGET_EVEX512") - (V32HF "TARGET_AVX512FP16 && TARGET_AVX512VL") + (V32HF "TARGET_AVX512FP16 && TARGET_AVX512VL && TARGET_EVEX512") (V32QI "TARGET_AVX") (V64QI "TARGET_AVX512F && TARGET_EVEX512")]) @@ -3464,7 +3462,7 @@ (V8SI "TARGET_AVX2") (V4DI "TARGET_AVX2") (V8SF "TARGET_AVX") (V4DF "TARGET_AVX") (V64QI "TARGET_AVX512BW && TARGET_EVEX512") - (V32HF "TARGET_AVX512FP16 && TARGET_AVX512VL") + (V32HF "TARGET_AVX512FP16 && TARGET_AVX512VL && TARGET_EVEX512") (V32HI "TARGET_AVX512BW && TARGET_EVEX512") (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8DI "TARGET_AVX512F && TARGET_EVEX512") @@ -5318,7 +5316,7 @@ (HF "TARGET_AVX512FP16") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") - (V32HF "TARGET_AVX512FP16")]) + (V32HF "TARGET_AVX512FP16 && TARGET_EVEX512")]) (define_expand "fma4" [(set (match_operand:FMAMODEM 0 "register_operand") @@ -5427,7 +5425,7 @@ ;; Suppose AVX-512F as baseline (define_mode_iterator VFH_SF_AVX512VL - [(V32HF "TARGET_AVX512FP16") + [(V32HF "TARGET_AVX512FP16 && TARGET_EVEX512") (V16HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (V8HF "TARGET_AVX512FP16 && TARGET_AVX512VL") (HF "TARGET_AVX512FP16") @@ -17322,7 +17320,7 @@ (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V32HI "TARGET_AVX512BW && TARGET_EVEX512") (V64QI "TARGET_AVX512VBMI && TARGET_EVEX512") - (V32HF "TARGET_AVX512FP16")]) + (V32HF "TARGET_AVX512FP16 && TARGET_EVEX512")]) (define_expand "vec_perm" [(match_operand:VEC_PERM_AVX2 0 "register_operand")