diff mbox series

test: Block slp-16.c check for target support vect_strided6

Message ID 20230915090349.2249556-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series test: Block slp-16.c check for target support vect_strided6 |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Sept. 15, 2023, 9:03 a.m. UTC 
  This testcase FAIL in RISC-V because RISC-V support vect_load_lanes with 6.
FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2

Since it use vlseg6 (vect_load_lanes with array size = 6)

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/slp-16.c: Block vect_strided6.
	* lib/target-supports.exp: Add strided type.

---
 gcc/testsuite/gcc.dg/vect/slp-16.c    | 2 +-
 gcc/testsuite/lib/target-supports.exp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Richard Biener Sept. 15, 2023, 9:37 a.m. UTC | #1 
On Fri, 15 Sep 2023, Juzhe-Zhong wrote:

> This testcase FAIL in RISC-V because RISC-V support vect_load_lanes with 6.
> FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
> FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
> 
> Since it use vlseg6 (vect_load_lanes with array size = 6)

OK.

> gcc/testsuite/ChangeLog:
> 
> 	* gcc.dg/vect/slp-16.c: Block vect_strided6.
> 	* lib/target-supports.exp: Add strided type.
> 
> ---
>  gcc/testsuite/gcc.dg/vect/slp-16.c    | 2 +-
>  gcc/testsuite/lib/target-supports.exp | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.dg/vect/slp-16.c b/gcc/testsuite/gcc.dg/vect/slp-16.c
> index d053a64276d..44ba730bda8 100644
> --- a/gcc/testsuite/gcc.dg/vect/slp-16.c
> +++ b/gcc/testsuite/gcc.dg/vect/slp-16.c
> @@ -67,5 +67,5 @@ int main (void)
>  }
>  
>  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } } */
> -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
> +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_int_mult && {! vect_strided6 } } } } } */
>    
> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
> index edaa010258f..2de41cef2f6 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -8621,7 +8621,7 @@ proc check_effective_target_vect_interleave { } {
>  		 && [check_effective_target_s390_vx]) }}]
>  }
>  
> -foreach N {2 3 4 8} {
> +foreach N {2 3 4 5 6 7 8} {
>      eval [string map [list N $N] {
>  	# Return 1 if the target supports 2-vector interleaving
>  	proc check_effective_target_vect_stridedN { } {
>
Li, Pan2 via Gcc-patches Sept. 15, 2023, 11:08 a.m. UTC | #2 
Committed, thanks Richard.

Pan

-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 5:38 PM
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Cc: gcc-patches@gcc.gnu.org; jeffreyalaw@gmail.com; richard.sandiford@arm.com
Subject: Re: [PATCH] test: Block slp-16.c check for target support vect_strided6

On Fri, 15 Sep 2023, Juzhe-Zhong wrote:

> This testcase FAIL in RISC-V because RISC-V support vect_load_lanes with 6.
> FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
> FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
> 
> Since it use vlseg6 (vect_load_lanes with array size = 6)

OK.

> gcc/testsuite/ChangeLog:
> 
> 	* gcc.dg/vect/slp-16.c: Block vect_strided6.
> 	* lib/target-supports.exp: Add strided type.
> 
> ---
>  gcc/testsuite/gcc.dg/vect/slp-16.c    | 2 +-
>  gcc/testsuite/lib/target-supports.exp | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.dg/vect/slp-16.c b/gcc/testsuite/gcc.dg/vect/slp-16.c
> index d053a64276d..44ba730bda8 100644
> --- a/gcc/testsuite/gcc.dg/vect/slp-16.c
> +++ b/gcc/testsuite/gcc.dg/vect/slp-16.c
> @@ -67,5 +67,5 @@ int main (void)
>  }
>  
>  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } } */
> -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
> +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_int_mult && {! vect_strided6 } } } } } */
>    
> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
> index edaa010258f..2de41cef2f6 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -8621,7 +8621,7 @@ proc check_effective_target_vect_interleave { } {
>  		 && [check_effective_target_s390_vx]) }}]
>  }
>  
> -foreach N {2 3 4 8} {
> +foreach N {2 3 4 5 6 7 8} {
>      eval [string map [list N $N] {
>  	# Return 1 if the target supports 2-vector interleaving
>  	proc check_effective_target_vect_stridedN { } {
>
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.dg/vect/slp-16.c b/gcc/testsuite/gcc.dg/vect/slp-16.c
index d053a64276d..44ba730bda8 100644
--- a/gcc/testsuite/gcc.dg/vect/slp-16.c
+++ b/gcc/testsuite/gcc.dg/vect/slp-16.c
@@ -67,5 +67,5 @@  int main (void)
 }
 
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_int_mult && {! vect_strided6 } } } } } */
   
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index edaa010258f..2de41cef2f6 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8621,7 +8621,7 @@  proc check_effective_target_vect_interleave { } {
 		 && [check_effective_target_s390_vx]) }}]
 }
 
-foreach N {2 3 4 8} {
+foreach N {2 3 4 5 6 7 8} {
     eval [string map [list N $N] {
 	# Return 1 if the target supports 2-vector interleaving
 	proc check_effective_target_vect_stridedN { } {