diff mbox series

[RISC-V] fix PR 111259 invalid zcmp mov predicate.

Message ID 20230915012008.17934-1-gaofei@eswincomputing.com
State Unresolved
Headers
Series [RISC-V] fix PR 111259 invalid zcmp mov predicate. |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Fei Gao Sept. 15, 2023, 1:20 a.m. UTC 
  The code changes are from Palmer.

root cause:
In a gcc build with --enable-checking=yes, REGNO (op) checks
rtx code and expected code 'reg'. so a rtx with 'subreg' causes
an internal compiler error.

solution:
Restrict predicate to allow 'reg' only.

gcc/ChangeLog:

        * config/riscv/predicates.md: Restrict predicate
            to allow 'reg' only.
---
 gcc/config/riscv/predicates.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Kito Cheng Sept. 15, 2023, 8:49 a.m. UTC | #1 
I guess another solution is using reg_or_subregno instead of REGNO, but
that should not catch more cases, and just more run-time check, so this
version is LGTM.
Patrick O'Neill Sept. 15, 2023, 4:37 p.m. UTC | #2 
On 9/15/23 01:49, Kito Cheng via Gcc-patches wrote:

> I guess another solution is using reg_or_subregno instead of REGNO, but
> that should not catch more cases, and just more run-time check, so this
> version is LGTM.
I tested an equivalent patch (without the comment changes).
This patch resolves the build errors on glibc rv64gc with
--enable-checking=rtl.
Tested for regressions (without --enable-checking=rtl) using rv64gc &
rv32gc glibc.

This patch does not cause any regressions on those targets.

Patrick
Palmer Dabbelt Sept. 15, 2023, 8:06 p.m. UTC | #3 
On Fri, 15 Sep 2023 09:37:48 PDT (-0700), Patrick O'Neill wrote:
> On 9/15/23 01:49, Kito Cheng via Gcc-patches wrote:
>
>> I guess another solution is using reg_or_subregno instead of REGNO, but
>> that should not catch more cases, and just more run-time check, so this
>> version is LGTM.
> I tested an equivalent patch (without the comment changes).
> This patch resolves the build errors on glibc rv64gc with
> --enable-checking=rtl.
> Tested for regressions (without --enable-checking=rtl) using rv64gc &
> rv32gc glibc.
>
> This patch does not cause any regressions on those targets.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>T
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>

Thanks!

>
> Patrick
Patrick O'Neill Sept. 15, 2023, 8:45 p.m. UTC | #4 
Committed - Thanks!

Patrick

On 9/15/23 13:06, Palmer Dabbelt wrote:
> On Fri, 15 Sep 2023 09:37:48 PDT (-0700), Patrick O'Neill wrote:
>> On 9/15/23 01:49, Kito Cheng via Gcc-patches wrote:
>>
>>> I guess another solution is using reg_or_subregno instead of REGNO, but
>>> that should not catch more cases, and just more run-time check, so this
>>> version is LGTM.
>> I tested an equivalent patch (without the comment changes).
>> This patch resolves the build errors on glibc rv64gc with
>> --enable-checking=rtl.
>> Tested for regressions (without --enable-checking=rtl) using rv64gc &
>> rv32gc glibc.
>>
>> This patch does not cause any regressions on those targets.
>
> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>T
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
>
> Thanks!
>
>>
>> Patrick
diff mbox series

Patch

diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 53e7c1d03aa..4bc7ff2c9d8 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -74,6 +74,7 @@ 
   (ior (match_operand 0 "const_0_operand")
        (match_operand 0 "register_operand")))
 
+;; ZCMP predicates
 (define_predicate "stack_push_up_to_ra_operand"
   (and (match_code "const_int")
        (match_test "riscv_zcmp_valid_stack_adj_bytes_p (INTVAL (op) * -1, 1)")))
@@ -170,13 +171,12 @@ 
   (and (match_code "const_int")
        (match_test "riscv_zcmp_valid_stack_adj_bytes_p (INTVAL (op), 13)")))
 
-;; ZCMP predicates
 (define_predicate "a0a1_reg_operand"
-  (and (match_operand 0 "register_operand")
+  (and (match_code "reg")
        (match_test "IN_RANGE (REGNO (op), A0_REGNUM, A1_REGNUM)")))
 
 (define_predicate "zcmp_mv_sreg_operand"
-  (and (match_operand 0 "register_operand")
+  (and (match_code "reg")
        (match_test "TARGET_RVE ? IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
                     : IN_RANGE (REGNO (op), S0_REGNUM, S1_REGNUM)
                     || IN_RANGE (REGNO (op), S2_REGNUM, S7_REGNUM)")))