diff mbox series

[v4,13/22] LoongArch: Add tests for ASX xvldrepl/xvstelm instruction generation.

Message ID 20230913034026.7751-4-chenxiaolong@loongson.cn
State Accepted
Headers
Series Added support for ASX vector instructions. |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

chenxiaolong Sept. 13, 2023, 3:40 a.m. UTC 
  gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c: New test.
	* gcc.target/loongarch/vector/lasx/lasx-xvstelm.c: New test.
---
 .../loongarch/vector/lasx/lasx-xvldrepl.c        | 16 ++++++++++++++++
 .../loongarch/vector/lasx/lasx-xvstelm.c         | 14 ++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvstelm.c
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c
new file mode 100644
index 00000000000..10556795119
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvldrepl.c
@@ -0,0 +1,16 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mlasx" } */
+/* { dg-final { scan-assembler-times "xvldrepl.w" 2} } */
+
+#define N 258
+
+float a[N], b[N], c[N];
+
+void
+test ()
+{
+  for (int i = 0; i < 256; i++)
+    {
+      a[i] = c[0] * b[i] + c[1];
+    }
+}
diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvstelm.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvstelm.c
new file mode 100644
index 00000000000..1a7b0e86f8b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xvstelm.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mlasx" } */
+/* { dg-final { scan-assembler-times "xvstelm.w" 8} } */
+
+#define LEN 256
+
+float a[LEN], b[LEN], c[LEN];
+
+void
+test ()
+{
+  for (int i = 0; i < LEN; i += 2)
+    a[i] = b[i] + c[i];
+}