diff mbox series

RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]

Message ID 20230912131927.83094-1-juzhe.zhong@rivai.ai
State Unresolved
Headers
Series RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337] |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

juzhe.zhong@rivai.ai Sept. 12, 2023, 1:19 p.m. UTC 
  As this PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111337

We support VECTOR BOOL vcond_mask to fix this following ICE:
0x1a9e309 gimple_expand_vec_cond_expr
        ../../../../gcc/gcc/gimple-isel.cc:283
0x1a9ea56 execute
        ../../../../gcc/gcc/gimple-isel.cc:390

gcc/ChangeLog:

	* config/riscv/autovec.md (@vcond_mask_<mode><mode>): New pattern.

---
 gcc/config/riscv/autovec.md | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Robin Dapp Sept. 12, 2023, 1:29 p.m. UTC | #1 
Maybe you want to add PR target/111337 to the changelog?

The rest LGTM.

Regards
 Robin
juzhe.zhong@rivai.ai Sept. 12, 2023, 1:32 p.m. UTC | #2 
Ok add it in V2:

https://gcc.gnu.org/pipermail/gcc-patches/2023-September/630048.html 



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-09-12 21:29
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
Maybe you want to add PR target/111337 to the changelog?
 
The rest LGTM.
 
Regards
Robin
diff mbox series

Patch

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index e9dd40af935..45a70f16ee1 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -565,6 +565,40 @@ 
   [(set_attr "type" "vector")]
 )
 
+;; -------------------------------------------------------------------------
+;; ---- [BOOL] Select based on masks
+;; -------------------------------------------------------------------------
+;; Includes merging patterns for:
+;; - vmand.mm
+;; - vmor.mm
+;; - vmnot.m
+;; -------------------------------------------------------------------------
+
+(define_expand "@vcond_mask_<mode><mode>"
+  [(match_operand:VB 0 "register_operand")
+   (match_operand:VB 1 "register_operand")
+   (match_operand:VB 2 "register_operand")
+   (match_operand:VB 3 "register_operand")]
+  "TARGET_VECTOR"
+  {
+    /* mask1 = operands[3] & operands[1].  */
+    rtx mask1 = expand_binop (<MODE>mode, and_optab, operands[1],
+			      operands[3], NULL_RTX, 0,
+			      OPTAB_DIRECT);
+    /* mask2 = ~operands[3] & operands[2].  */
+    rtx inverse = expand_unop (<MODE>mode, one_cmpl_optab, operands[3],
+			       NULL_RTX, 0);
+    rtx mask2 = expand_binop (<MODE>mode, and_optab, operands[2],
+			      inverse, NULL_RTX, 0,
+			      OPTAB_DIRECT);
+    /* result = mask1 | mask2.  */
+    rtx result = expand_binop (<MODE>mode, ior_optab, mask1,
+			       mask2, NULL_RTX, 0,
+			       OPTAB_DIRECT);
+    emit_move_insn (operands[0], result);
+    DONE;
+  })
+
 ;; -------------------------------------------------------------------------
 ;; ---- [INT,FP] Comparisons
 ;; -------------------------------------------------------------------------