diff mbox series

[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm

Message ID 20230910140710.2167538-1-juzhe.zhong@rivai.ai
State Unresolved
Headers
Series [V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

juzhe.zhong@rivai.ai Sept. 10, 2023, 2:07 p.m. UTC 
  gcc/ChangeLog:

	* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.

---
 gcc/config/riscv/riscv-v.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

juzhe.zhong@rivai.ai Sept. 10, 2023, 2:07 p.m. UTC | #1 
Address comment: [PATCH V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm (gnu.org)



juzhe.zhong@rivai.ai
 
From: Juzhe-Zhong
Date: 2023-09-10 22:07
To: gcc-patches
CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
gcc/ChangeLog:
 
* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
 
---
gcc/config/riscv/riscv-v.cc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
 
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index bee60de1d26..3cd1f61de0e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2647,7 +2647,8 @@ shuffle_compress_patterns (struct expand_vec_perm_d *d)
    For index = { 0, 2, 5, 6}, we need to slide op1 up before
    we apply compress approach.  */
-  bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1);
+  bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1)
+ && !const_vec_duplicate_p (d->op1);
   /* If we leave it directly be handled by general gather,
      the code sequence will be:
-- 
2.36.3
Jeff Law Sept. 10, 2023, 3:25 p.m. UTC | #2 
On 9/10/23 08:07, Juzhe-Zhong wrote:
> gcc/ChangeLog:
> 
> 	* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
OK
jeff
Li, Pan2 via Gcc-patches Sept. 10, 2023, 11:01 p.m. UTC | #3 
Committed, thanks Jeff.

Pan

-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Jeff Law via Gcc-patches
Sent: Sunday, September 10, 2023 11:25 PM
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>; gcc-patches@gcc.gnu.org
Cc: kito.cheng@sifive.com; kito.cheng@gmail.com
Subject: Re: [PATCH V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm



On 9/10/23 08:07, Juzhe-Zhong wrote:
> gcc/ChangeLog:
> 
> 	* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
OK
jeff
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index bee60de1d26..3cd1f61de0e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2647,7 +2647,8 @@  shuffle_compress_patterns (struct expand_vec_perm_d *d)
 
 	    For index = { 0, 2, 5, 6}, we need to slide op1 up before
 	    we apply compress approach.  */
-  bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1);
+  bool need_slideup_p = maybe_ne (d->perm[vlen - 1], 2 * vec_len - 1)
+			&& !const_vec_duplicate_p (d->op1);
 
   /* If we leave it directly be handled by general gather,
      the code sequence will be: