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Creates a new type "csr" for these instructions for now. gcc/ChangeLog: * config/riscv/riscv.md: Add "csr" type * config/riscv/zc.md: Update types Signed-off-by: Edwin Lu --- gcc/config/riscv/riscv.md | 3 +- gcc/config/riscv/zc.md | 102 +++++++++++++++++++------------------- 2 files changed, 54 insertions(+), 51 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index d80b6938f84..6684ad89cff 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -312,6 +312,7 @@ (define_attr "ext_enabled" "no,yes" ;; condmove conditional moves ;; cbo cache block instructions ;; crypto cryptography instructions +;; csr code size reduction instructions ;; Classification of RVV instructions which will be added to each RVV .md pattern and used by scheduler. ;; rdvlenb vector byte length vlenb csrr read ;; rdvl vector length vl csrr read @@ -421,7 +422,7 @@ (define_attr "type" mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,trap,ghost,bitmanip, rotate,clmul,min,max,minu,maxu,clz,ctz,cpop, - atomic,condmove,cbo,crypto,rdvlenb,rdvl,wrvxrm,wrfrm,rdfrm,vsetvl, + atomic,condmove,cbo,crypto,csr,rdvlenb,rdvl,wrvxrm,wrfrm,rdfrm,vsetvl, vlde,vste,vldm,vstm,vlds,vsts, vldux,vldox,vstux,vstox,vldff,vldr,vstr, vlsegde,vssegte,vlsegds,vssegts,vlsegdux,vlsegdox,vssegtux,vssegtox,vlsegdff, diff --git a/gcc/config/riscv/zc.md b/gcc/config/riscv/zc.md index 77b28adde95..86f1afd66cb 100644 --- a/gcc/config/riscv/zc.md +++ b/gcc/config/riscv/zc.md @@ -27,7 +27,7 @@ (define_insn "@gpr_multi_pop_up_to_ra_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s0_" [(set (reg:X SP_REGNUM) @@ -41,7 +41,7 @@ (define_insn "@gpr_multi_pop_up_to_s0_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s1_" [(set (reg:X SP_REGNUM) @@ -58,7 +58,7 @@ (define_insn "@gpr_multi_pop_up_to_s1_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s1}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s2_" [(set (reg:X SP_REGNUM) @@ -78,7 +78,7 @@ (define_insn "@gpr_multi_pop_up_to_s2_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s2}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s3_" [(set (reg:X SP_REGNUM) @@ -101,7 +101,7 @@ (define_insn "@gpr_multi_pop_up_to_s3_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s3}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s4_" [(set (reg:X SP_REGNUM) @@ -127,7 +127,7 @@ (define_insn "@gpr_multi_pop_up_to_s4_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s4}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s5_" [(set (reg:X SP_REGNUM) @@ -156,7 +156,7 @@ (define_insn "@gpr_multi_pop_up_to_s5_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s5}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s6_" [(set (reg:X SP_REGNUM) @@ -188,7 +188,7 @@ (define_insn "@gpr_multi_pop_up_to_s6_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s6}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s7_" [(set (reg:X SP_REGNUM) @@ -223,7 +223,7 @@ (define_insn "@gpr_multi_pop_up_to_s7_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s7}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s8_" [(set (reg:X SP_REGNUM) @@ -261,7 +261,7 @@ (define_insn "@gpr_multi_pop_up_to_s8_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s8}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s9_" [(set (reg:X SP_REGNUM) @@ -302,7 +302,7 @@ (define_insn "@gpr_multi_pop_up_to_s9_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s9}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_pop_up_to_s11_" [(set (reg:X SP_REGNUM) @@ -349,7 +349,7 @@ (define_insn "@gpr_multi_pop_up_to_s11_" (const_int ))))] "TARGET_ZCMP" "cm.pop {ra, s0-s11}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_ra_" [(set (reg:X SP_REGNUM) @@ -362,7 +362,7 @@ (define_insn "@gpr_multi_popret_up_to_ra_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s0_" [(set (reg:X SP_REGNUM) @@ -378,7 +378,7 @@ (define_insn "@gpr_multi_popret_up_to_s0_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s1_" [(set (reg:X SP_REGNUM) @@ -397,7 +397,7 @@ (define_insn "@gpr_multi_popret_up_to_s1_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s1}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s2_" [(set (reg:X SP_REGNUM) @@ -419,7 +419,7 @@ (define_insn "@gpr_multi_popret_up_to_s2_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s2}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s3_" [(set (reg:X SP_REGNUM) @@ -444,7 +444,7 @@ (define_insn "@gpr_multi_popret_up_to_s3_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s3}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s4_" [(set (reg:X SP_REGNUM) @@ -472,7 +472,7 @@ (define_insn "@gpr_multi_popret_up_to_s4_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s4}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s5_" [(set (reg:X SP_REGNUM) @@ -503,7 +503,7 @@ (define_insn "@gpr_multi_popret_up_to_s5_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s5}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s6_" [(set (reg:X SP_REGNUM) @@ -537,7 +537,7 @@ (define_insn "@gpr_multi_popret_up_to_s6_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s6}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s7_" [(set (reg:X SP_REGNUM) @@ -574,7 +574,7 @@ (define_insn "@gpr_multi_popret_up_to_s7_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s7}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s8_" [(set (reg:X SP_REGNUM) @@ -614,7 +614,7 @@ (define_insn "@gpr_multi_popret_up_to_s8_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s8}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s9_" [(set (reg:X SP_REGNUM) @@ -657,7 +657,7 @@ (define_insn "@gpr_multi_popret_up_to_s9_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s9}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popret_up_to_s11_" [(set (reg:X SP_REGNUM) @@ -706,7 +706,7 @@ (define_insn "@gpr_multi_popret_up_to_s11_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popret {ra, s0-s11}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_ra_" [(set (reg:X SP_REGNUM) @@ -722,7 +722,7 @@ (define_insn "@gpr_multi_popretz_up_to_ra_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s0_" [(set (reg:X SP_REGNUM) @@ -741,7 +741,7 @@ (define_insn "@gpr_multi_popretz_up_to_s0_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s1_" [(set (reg:X SP_REGNUM) @@ -763,7 +763,7 @@ (define_insn "@gpr_multi_popretz_up_to_s1_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s1}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s2_" [(set (reg:X SP_REGNUM) @@ -788,7 +788,7 @@ (define_insn "@gpr_multi_popretz_up_to_s2_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s2}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s3_" [(set (reg:X SP_REGNUM) @@ -816,7 +816,7 @@ (define_insn "@gpr_multi_popretz_up_to_s3_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s3}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s4_" [(set (reg:X SP_REGNUM) @@ -847,7 +847,7 @@ (define_insn "@gpr_multi_popretz_up_to_s4_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s4}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s5_" [(set (reg:X SP_REGNUM) @@ -881,7 +881,7 @@ (define_insn "@gpr_multi_popretz_up_to_s5_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s5}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s6_" [(set (reg:X SP_REGNUM) @@ -918,7 +918,7 @@ (define_insn "@gpr_multi_popretz_up_to_s6_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s6}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s7_" [(set (reg:X SP_REGNUM) @@ -958,7 +958,7 @@ (define_insn "@gpr_multi_popretz_up_to_s7_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s7}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s8_" [(set (reg:X SP_REGNUM) @@ -1001,7 +1001,7 @@ (define_insn "@gpr_multi_popretz_up_to_s8_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s8}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s9_" [(set (reg:X SP_REGNUM) @@ -1047,7 +1047,7 @@ (define_insn "@gpr_multi_popretz_up_to_s9_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s9}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_popretz_up_to_s11_" [(set (reg:X SP_REGNUM) @@ -1099,7 +1099,7 @@ (define_insn "@gpr_multi_popretz_up_to_s11_" (use (reg:SI RETURN_ADDR_REGNUM))] "TARGET_ZCMP" "cm.popretz {ra, s0-s11}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_ra_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1110,7 +1110,7 @@ (define_insn "@gpr_multi_push_up_to_ra_" (match_operand 0 "stack_push_up_to_ra_operand" "I")))] "TARGET_ZCMP" "cm.push {ra}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s0_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1124,7 +1124,7 @@ (define_insn "@gpr_multi_push_up_to_s0_" (match_operand 0 "stack_push_up_to_s0_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s1_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1141,7 +1141,7 @@ (define_insn "@gpr_multi_push_up_to_s1_" (match_operand 0 "stack_push_up_to_s1_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s1}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s2_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1161,7 +1161,7 @@ (define_insn "@gpr_multi_push_up_to_s2_" (match_operand 0 "stack_push_up_to_s2_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s2}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s3_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1184,7 +1184,7 @@ (define_insn "@gpr_multi_push_up_to_s3_" (match_operand 0 "stack_push_up_to_s3_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s3}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s4_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1210,7 +1210,7 @@ (define_insn "@gpr_multi_push_up_to_s4_" (match_operand 0 "stack_push_up_to_s4_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s4}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s5_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1239,7 +1239,7 @@ (define_insn "@gpr_multi_push_up_to_s5_" (match_operand 0 "stack_push_up_to_s5_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s5}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s6_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1271,7 +1271,7 @@ (define_insn "@gpr_multi_push_up_to_s6_" (match_operand 0 "stack_push_up_to_s6_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s6}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s7_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1306,7 +1306,7 @@ (define_insn "@gpr_multi_push_up_to_s7_" (match_operand 0 "stack_push_up_to_s7_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s7}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s8_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1344,7 +1344,7 @@ (define_insn "@gpr_multi_push_up_to_s8_" (match_operand 0 "stack_push_up_to_s8_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s8}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s9_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1385,7 +1385,7 @@ (define_insn "@gpr_multi_push_up_to_s9_" (match_operand 0 "stack_push_up_to_s9_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s9}, %0" -) +[(set_attr "type" "csr")]) (define_insn "@gpr_multi_push_up_to_s11_" [(set (mem:X (plus:X (reg:X SP_REGNUM) @@ -1432,7 +1432,7 @@ (define_insn "@gpr_multi_push_up_to_s11_" (match_operand 0 "stack_push_up_to_s11_operand" "I")))] "TARGET_ZCMP" "cm.push {ra, s0-s11}, %0" -) +[(set_attr "type" "csr")]) ;; ZCMP mv (define_insn "*mva01s" @@ -1443,7 +1443,8 @@ (define_insn "*mva01s" "TARGET_ZCMP && (REGNO (operands[2]) != REGNO (operands[0]))" { return (REGNO (operands[0]) == A0_REGNUM)?"cm.mva01s\t%1,%3":"cm.mva01s\t%3,%1"; } - [(set_attr "mode" "")]) + [(set_attr "mode" "") + (set_attr "type" "csr")]) (define_insn "*mvsa01" [(set (match_operand:X 0 "zcmp_mv_sreg_operand" "=r") @@ -1454,4 +1455,5 @@ (define_insn "*mvsa01" && (REGNO (operands[0]) != REGNO (operands[2])) && (REGNO (operands[1]) != REGNO (operands[3]))" { return (REGNO (operands[1]) == A0_REGNUM)?"cm.mvsa01\t%0,%2":"cm.mvsa01\t%2,%0"; } - [(set_attr "mode" "")]) + [(set_attr "mode" "") + (set_attr "type" "csr")])