[v1,2/4] LoongArch: Add testsuite framework for Loongson SX/ASX.

Message ID 20230906104512.46432-1-chenxiaolong@loongson.cn
State Accepted
Headers
Series Add Loongson SX/ASX instruction support to LoongArch |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

chenxiaolong Sept. 6, 2023, 10:45 a.m. UTC
  gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vector/loongarch-vector.exp: New test.
	* gcc.target/loongarch/vector/simd_correctness_check.h: New test.
---
 .../loongarch/vector/loongarch-vector.exp     | 42 +++++++++++++++++++
 .../loongarch/vector/simd_correctness_check.h | 39 +++++++++++++++++
 2 files changed, 81 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h
  

Patch

diff --git a/gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp b/gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp
new file mode 100644
index 00000000000..b0616a26b0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/vector/loongarch-vector.exp
@@ -0,0 +1,42 @@ 
+# Copyright (C) 2021-2023 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a LoongArch target.
+if ![istarget loongarch*-*-*] then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+    set DEFAULT_CFLAGS " -mlasx"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/lsx/*.\[cS\]]] \
+	"" $DEFAULT_CFLAGS
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/lasx/*.\[cS\]]] \
+	"" $DEFAULT_CFLAGS
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h b/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h
new file mode 100644
index 00000000000..7be199ee3a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/vector/simd_correctness_check.h
@@ -0,0 +1,39 @@ 
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define ASSERTEQ_64(line, ref, res)							\
+do{											\
+    int fail = 0;									\
+    for(size_t i = 0; i < sizeof(res)/sizeof(res[0]); ++i){				\
+	long *temp_ref = &ref[i], *temp_res = &res[i];					\
+	if(abs(*temp_ref - *temp_res) > 0){						\
+	    printf(" error: %s at line %ld , expected "#ref"[%ld]:0x%lx, got: 0x%lx\n",	\
+                   __FILE__, line, i, *temp_ref, *temp_res);				\
+			    fail = 1;							\
+	}										\
+    }											\
+    if(fail == 1) abort();								\
+}while(0) 
+
+#define ASSERTEQ_32(line, ref, res)							\
+do{											\
+    int fail = 0;									\
+    for(size_t i = 0; i < sizeof(res)/sizeof(res[0]); ++i){				\
+	int *temp_ref = &ref[i], *temp_res = &res[i];					\
+	if(abs(*temp_ref - *temp_res) > 0){						\
+	    printf(" error: %s at line %ld , expected "#ref"[%ld]:0x%x, got: 0x%x\n",	\
+		   __FILE__, line, i, *temp_ref, *temp_res);				\
+	    fail = 1;									\
+	}										\
+    }											\
+    if(fail == 1) abort();								\
+}while(0) 
+
+#define ASSERTEQ_int(line, ref, res)							\
+do{											\
+    if (ref != res){									\
+	printf(" error: %s at line %ld , expected %d, got %d\n",	  		\
+	       __FILE__, line, ref, res);						\
+    }											\
+}while(0)