RISC-V: Export functions as global extern preparing for dynamic LMUL patch use
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Commit Message
Notice those functions need to be use by COST model for dynamic LMUL use.
Extract as a single patch and committed.
gcc/ChangeLog:
* config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
(get_all_predecessors): New function.
(get_all_successors): Ditto.
* config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
(get_all_successors): Ditto.
* config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
* config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
---
gcc/config/riscv/riscv-protos.h | 3 ++
gcc/config/riscv/riscv-v.cc | 48 +++++++++++++++++++++++
gcc/config/riscv/riscv-vector-builtins.cc | 2 +-
gcc/config/riscv/riscv-vsetvl.cc | 25 ------------
4 files changed, 52 insertions(+), 26 deletions(-)
@@ -365,6 +365,7 @@ enum avl_type
/* Routines implemented in riscv-vector-builtins.cc. */
void init_builtins (void);
const char *mangle_builtin_type (const_tree);
+tree lookup_vector_type_attribute (const_tree);
#ifdef GCC_TARGET_H
bool verify_type_context (location_t, type_context_kind, const_tree, bool);
bool expand_vec_perm_const (machine_mode, machine_mode, rtx, rtx, rtx,
@@ -493,6 +494,8 @@ enum floating_point_rounding_mode get_frm_mode (rtx);
opt_machine_mode vectorize_related_mode (machine_mode, scalar_mode,
poly_uint64);
unsigned int autovectorize_vector_modes (vec<machine_mode> *, bool);
+hash_set<basic_block> get_all_predecessors (basic_block);
+hash_set<basic_block> get_all_successors (basic_block);
}
/* We classify builtin types into two classes:
@@ -3387,4 +3387,52 @@ expand_fold_extract_last (rtx *ops)
emit_label (end_label);
}
+hash_set<basic_block>
+get_all_predecessors (basic_block bb)
+{
+ hash_set<basic_block> blocks;
+ auto_vec<basic_block> work_list;
+ hash_set<basic_block> visited_list;
+ work_list.safe_push (bb);
+
+ while (!work_list.is_empty ())
+ {
+ basic_block new_bb = work_list.pop ();
+ visited_list.add (new_bb);
+ edge e;
+ edge_iterator ei;
+ FOR_EACH_EDGE (e, ei, new_bb->preds)
+ {
+ if (!visited_list.contains (e->src))
+ work_list.safe_push (e->src);
+ blocks.add (e->src);
+ }
+ }
+ return blocks;
+}
+
+hash_set<basic_block>
+get_all_successors (basic_block bb)
+{
+ hash_set<basic_block> blocks;
+ auto_vec<basic_block> work_list;
+ hash_set<basic_block> visited_list;
+ work_list.safe_push (bb);
+
+ while (!work_list.is_empty ())
+ {
+ basic_block new_bb = work_list.pop ();
+ visited_list.add (new_bb);
+ edge e;
+ edge_iterator ei;
+ FOR_EACH_EDGE (e, ei, new_bb->succs)
+ {
+ if (!visited_list.contains (e->dest))
+ work_list.safe_push (e->dest);
+ blocks.add (e->dest);
+ }
+ }
+ return blocks;
+}
+
} // namespace riscv_vector
@@ -2671,7 +2671,7 @@ sizeless_type_p (const_tree type)
/* If TYPE is an ABI-defined RVV type, return its attribute descriptor,
otherwise return null. */
-static tree
+tree
lookup_vector_type_attribute (const_tree type)
{
if (type == error_mark_node)
@@ -521,31 +521,6 @@ get_same_bb_set (hash_set<set_info *> &sets, const basic_block cfg_bb)
return nullptr;
}
-/* Recursively find all predecessor blocks for cfg_bb. */
-static hash_set<basic_block>
-get_all_predecessors (basic_block cfg_bb)
-{
- hash_set<basic_block> blocks;
- auto_vec<basic_block> work_list;
- hash_set<basic_block> visited_list;
- work_list.safe_push (cfg_bb);
-
- while (!work_list.is_empty ())
- {
- basic_block new_cfg_bb = work_list.pop ();
- visited_list.add (new_cfg_bb);
- edge e;
- edge_iterator ei;
- FOR_EACH_EDGE (e, ei, new_cfg_bb->preds)
- {
- if (!visited_list.contains (e->src))
- work_list.safe_push (e->src);
- blocks.add (e->src);
- }
- }
- return blocks;
-}
-
/* Helper function to get SEW operand. We always have SEW value for
all RVV instructions that have VTYPE OP. */
static uint8_t