diff mbox series

RISC-V: Enable VECT_COMPARE_COSTS by default

Message ID 20230831231000.1853225-1-juzhe.zhong@rivai.ai
State Unresolved
Headers
Series RISC-V: Enable VECT_COMPARE_COSTS by default |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

juzhe.zhong@rivai.ai Aug. 31, 2023, 11:10 p.m. UTC 
  since we have added COST framework, we by default enable VECT_COMPARE_COSTS.

Also, add 16/32/64 to provide more choices for COST comparison.

This patch doesn't change any behavior from the current testsuite since we are using
default COST model.

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable VECT_COMPARE_COSTS by default.

---
 gcc/config/riscv/riscv-v.cc | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Robin Dapp Sept. 1, 2023, 9:57 a.m. UTC | #1 
Hi Juzhe,

thanks, this is OK, we would have needed this sooner or later anyway.

Regards
 Robin
Li, Pan2 via Gcc-patches Sept. 1, 2023, 11:01 a.m. UTC | #2 
Committed, thank Robin.

Pan

-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Robin Dapp via Gcc-patches
Sent: Friday, September 1, 2023 5:58 PM
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>; gcc-patches@gcc.gnu.org
Cc: kito.cheng@sifive.com; kito.cheng@gmail.com
Subject: Re: [PATCH] RISC-V: Enable VECT_COMPARE_COSTS by default

Hi Juzhe,

thanks, this is OK, we would have needed this sooner or later anyway.

Regards
 Robin
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 6228ff3d92e..c8ad96f44d5 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2173,7 +2173,7 @@  autovectorize_vector_modes (vector_modes *modes, bool)
 	   full vectors for wider elements.
 	 - full_size / 8:
 	   Try using 64-bit containers for all element types.  */
-      static const int rvv_factors[] = {1, 2, 4, 8};
+      static const int rvv_factors[] = {1, 2, 4, 8, 16, 32, 64};
       for (unsigned int i = 0; i < sizeof (rvv_factors) / sizeof (int); i++)
 	{
 	  poly_uint64 units;
@@ -2183,12 +2183,8 @@  autovectorize_vector_modes (vector_modes *modes, bool)
 	    modes->safe_push (mode);
 	}
     }
-  unsigned int flag = 0;
   if (TARGET_VECTOR_VLS)
     {
-      /* Enable VECT_COMPARE_COSTS between VLA modes VLS modes for scalable
-	 auto-vectorization.  */
-      flag |= VECT_COMPARE_COSTS;
       /* Push all VLSmodes according to TARGET_MIN_VLEN.  */
       unsigned int i = 0;
       unsigned int base_size = TARGET_MIN_VLEN * riscv_autovec_lmul / 8;
@@ -2201,7 +2197,8 @@  autovectorize_vector_modes (vector_modes *modes, bool)
 	  size = base_size / (1U << i);
 	}
     }
-  return flag;
+  /* Enable LOOP_VINFO comparison in COST model.  */
+  return VECT_COMPARE_COSTS;
 }
 
 /* If the given VECTOR_MODE is an RVV mode,  first get the largest number