Message ID | 20230830011256.1898667-1-yanzhang.wang@intel.com |
---|---|
State | Accepted |
Headers |
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Date: Wed, 30 Aug 2023 09:09:04 +0800 Message-ID: <20230830011256.1898667-1-yanzhang.wang@intel.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: "yanzhang.wang--- via Gcc-patches" <gcc-patches@gcc.gnu.org> Reply-To: yanzhang.wang@intel.com Cc: yanzhang.wang@intel.com, apinski@marvell.com, juzhe.zhong@rivai.ai, kito.cheng@sifive.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1775614701261724854 X-GMAIL-MSGID: 1775614701261724854 |
Series |
Bug 111071: fix the subr with -1 to not due to the simplify.
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Checks
Context | Check | Description |
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snail/gcc-patch-check | success | Github commit url |
Commit Message
Li, Pan2 via Gcc-patches
Aug. 30, 2023, 1:09 a.m. UTC
From: Yanzhang Wang <yanzhang.wang@intel.com> gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/acle/asm/subr_s8.c: Modify subr with -1 to not. Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com> --- Tested on my local arm environment and passed. Thanks Andrew Pinski's comment the code is the same with that. gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
Comments
"yanzhang.wang--- via Gcc-patches" <gcc-patches@gcc.gnu.org> writes: > From: Yanzhang Wang <yanzhang.wang@intel.com> > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/sve/acle/asm/subr_s8.c: Modify subr with -1 > to not. > > Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com> > --- > > Tested on my local arm environment and passed. Thanks Andrew Pinski's comment > the code is the same with that. > > gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c > index b9615de6655..1cf6916a5e0 100644 > --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c > +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c > @@ -76,8 +76,7 @@ TEST_UNIFORM_Z (subr_1_s8_m_untied, svint8_t, > > /* > ** subr_m1_s8_m: > -** mov (z[0-9]+\.b), #-1 > -** subr z0\.b, p0/m, z0\.b, \1 > +** not z0.b, p0/m, z0.b > ** ret > */ > TEST_UNIFORM_Z (subr_m1_s8_m, svint8_t, I think we need this for subr_u8.c too. OK with that change, and thanks for the fix! Richard
Richard Sandiford <richard.sandiford@arm.com> writes: > "yanzhang.wang--- via Gcc-patches" <gcc-patches@gcc.gnu.org> writes: >> From: Yanzhang Wang <yanzhang.wang@intel.com> >> >> gcc/testsuite/ChangeLog: >> >> * gcc.target/aarch64/sve/acle/asm/subr_s8.c: Modify subr with -1 >> to not. >> >> Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com> >> --- >> >> Tested on my local arm environment and passed. Thanks Andrew Pinski's comment >> the code is the same with that. >> >> gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c >> index b9615de6655..1cf6916a5e0 100644 >> --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c >> +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c >> @@ -76,8 +76,7 @@ TEST_UNIFORM_Z (subr_1_s8_m_untied, svint8_t, >> >> /* >> ** subr_m1_s8_m: >> -** mov (z[0-9]+\.b), #-1 >> -** subr z0\.b, p0/m, z0\.b, \1 >> +** not z0.b, p0/m, z0.b >> ** ret >> */ >> TEST_UNIFORM_Z (subr_m1_s8_m, svint8_t, > > I think we need this for subr_u8.c too. OK with that change, > and thanks for the fix! Actually, never mind. I just saw a patch from Thiago Jung Bauerman for the same issue, which is now in trunk. Sorry for the confusion, and thanks again for posting the fix. Richard
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c index b9615de6655..1cf6916a5e0 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/subr_s8.c @@ -76,8 +76,7 @@ TEST_UNIFORM_Z (subr_1_s8_m_untied, svint8_t, /* ** subr_m1_s8_m: -** mov (z[0-9]+\.b), #-1 -** subr z0\.b, p0/m, z0\.b, \1 +** not z0.b, p0/m, z0.b ** ret */ TEST_UNIFORM_Z (subr_m1_s8_m, svint8_t,