[v2] LoongArch: Enable '-free' starting at -O2.
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Commit Message
v1 -> v2:
1. Modify Changelog information format.
gcc/ChangeLog:
* common/config/loongarch/loongarch-common.cc:
Enable '-free' on O2 and above.
* doc/invoke.texi: Modify the description information
of the '-free' compilation option and add the LoongArch
description.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/sign-extend.c: New test.
---
.../config/loongarch/loongarch-common.cc | 1 +
gcc/doc/invoke.texi | 4 +--
.../gcc.target/loongarch/sign-extend.c | 25 +++++++++++++++++++
3 files changed, 28 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/sign-extend.c
Comments
On Mon, 2023-08-28 at 11:46 +0800, Lulu Cheng wrote:
> v1 -> v2:
> 1. Modify Changelog information format.
>
> gcc/ChangeLog:
>
> * common/config/loongarch/loongarch-common.cc:
> Enable '-free' on O2 and above.
> * doc/invoke.texi: Modify the description information
> of the '-free' compilation option and add the LoongArch
> description.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/loongarch/sign-extend.c: New test.
LGTM.
> ---
> .../config/loongarch/loongarch-common.cc | 1 +
> gcc/doc/invoke.texi | 4 +--
> .../gcc.target/loongarch/sign-extend.c | 25 +++++++++++++++++++
> 3 files changed, 28 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/loongarch/sign-extend.c
>
> diff --git a/gcc/common/config/loongarch/loongarch-common.cc b/gcc/common/config/loongarch/loongarch-common.cc
> index fce32fa3f8d..c5ed37d27a6 100644
> --- a/gcc/common/config/loongarch/loongarch-common.cc
> +++ b/gcc/common/config/loongarch/loongarch-common.cc
> @@ -35,6 +35,7 @@ static const struct default_options loongarch_option_optimization_table[] =
> {
> { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
> { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
> + { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
> { OPT_LEVELS_NONE, 0, NULL, 0 }
> };
>
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index a32dabf0405..16aa92b5e86 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -12639,8 +12639,8 @@ Attempt to remove redundant extension instructions. This is especially
> helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit
> registers after writing to their lower 32-bit half.
>
> -Enabled for Alpha, AArch64, PowerPC, RISC-V, SPARC, h83000 and x86 at levels
> -@option{-O2}, @option{-O3}, @option{-Os}.
> +Enabled for Alpha, AArch64, LoongArch, PowerPC, RISC-V, SPARC, h83000 and x86 at
> +levels @option{-O2}, @option{-O3}, @option{-Os}.
>
> @opindex fno-lifetime-dse
> @opindex flifetime-dse
> diff --git a/gcc/testsuite/gcc.target/loongarch/sign-extend.c b/gcc/testsuite/gcc.target/loongarch/sign-extend.c
> new file mode 100644
> index 00000000000..3f339d06bbd
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/sign-extend.c
> @@ -0,0 +1,25 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mabi=lp64d -O2" } */
> +/* { dg-final { scan-assembler-times "slli.w" 1 } } */
> +
> +extern int PL_savestack_ix;
> +extern int PL_regsize;
> +extern int PL_savestack_max;
> +void Perl_savestack_grow_cnt (int need);
> +extern void Perl_croak (char *);
> +
> +int
> +S_regcppush(int parenfloor)
> +{
> + int retval = PL_savestack_ix;
> + int paren_elems_to_push = (PL_regsize - parenfloor) * 4;
> + int p;
> +
> + if (paren_elems_to_push < 0)
> + Perl_croak ("panic: paren_elems_to_push < 0");
> +
> + if (PL_savestack_ix + (paren_elems_to_push + 6) > PL_savestack_max)
> + Perl_savestack_grow_cnt (paren_elems_to_push + 6);
> +
> + return retval;
> +}
Pushed to r14-3533.
在 2023/8/28 下午5:21, Xi Ruoyao 写道:
> On Mon, 2023-08-28 at 11:46 +0800, Lulu Cheng wrote:
>> v1 -> v2:
>> 1. Modify Changelog information format.
>>
>> gcc/ChangeLog:
>>
>> * common/config/loongarch/loongarch-common.cc:
>> Enable '-free' on O2 and above.
>> * doc/invoke.texi: Modify the description information
>> of the '-free' compilation option and add the LoongArch
>> description.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/loongarch/sign-extend.c: New test.
> LGTM.
>
>> ---
>> .../config/loongarch/loongarch-common.cc | 1 +
>> gcc/doc/invoke.texi | 4 +--
>> .../gcc.target/loongarch/sign-extend.c | 25 +++++++++++++++++++
>> 3 files changed, 28 insertions(+), 2 deletions(-)
>> create mode 100644 gcc/testsuite/gcc.target/loongarch/sign-extend.c
>>
>> diff --git a/gcc/common/config/loongarch/loongarch-common.cc b/gcc/common/config/loongarch/loongarch-common.cc
>> index fce32fa3f8d..c5ed37d27a6 100644
>> --- a/gcc/common/config/loongarch/loongarch-common.cc
>> +++ b/gcc/common/config/loongarch/loongarch-common.cc
>> @@ -35,6 +35,7 @@ static const struct default_options loongarch_option_optimization_table[] =
>> {
>> { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
>> { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
>> + { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
>> { OPT_LEVELS_NONE, 0, NULL, 0 }
>> };
>>
>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
>> index a32dabf0405..16aa92b5e86 100644
>> --- a/gcc/doc/invoke.texi
>> +++ b/gcc/doc/invoke.texi
>> @@ -12639,8 +12639,8 @@ Attempt to remove redundant extension instructions. This is especially
>> helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit
>> registers after writing to their lower 32-bit half.
>>
>> -Enabled for Alpha, AArch64, PowerPC, RISC-V, SPARC, h83000 and x86 at levels
>> -@option{-O2}, @option{-O3}, @option{-Os}.
>> +Enabled for Alpha, AArch64, LoongArch, PowerPC, RISC-V, SPARC, h83000 and x86 at
>> +levels @option{-O2}, @option{-O3}, @option{-Os}.
>>
>> @opindex fno-lifetime-dse
>> @opindex flifetime-dse
>> diff --git a/gcc/testsuite/gcc.target/loongarch/sign-extend.c b/gcc/testsuite/gcc.target/loongarch/sign-extend.c
>> new file mode 100644
>> index 00000000000..3f339d06bbd
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/loongarch/sign-extend.c
>> @@ -0,0 +1,25 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-mabi=lp64d -O2" } */
>> +/* { dg-final { scan-assembler-times "slli.w" 1 } } */
>> +
>> +extern int PL_savestack_ix;
>> +extern int PL_regsize;
>> +extern int PL_savestack_max;
>> +void Perl_savestack_grow_cnt (int need);
>> +extern void Perl_croak (char *);
>> +
>> +int
>> +S_regcppush(int parenfloor)
>> +{
>> + int retval = PL_savestack_ix;
>> + int paren_elems_to_push = (PL_regsize - parenfloor) * 4;
>> + int p;
>> +
>> + if (paren_elems_to_push < 0)
>> + Perl_croak ("panic: paren_elems_to_push < 0");
>> +
>> + if (PL_savestack_ix + (paren_elems_to_push + 6) > PL_savestack_max)
>> + Perl_savestack_grow_cnt (paren_elems_to_push + 6);
>> +
>> + return retval;
>> +}
@@ -35,6 +35,7 @@ static const struct default_options loongarch_option_optimization_table[] =
{
{ OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
{ OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
+ { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
{ OPT_LEVELS_NONE, 0, NULL, 0 }
};
@@ -12639,8 +12639,8 @@ Attempt to remove redundant extension instructions. This is especially
helpful for the x86-64 architecture, which implicitly zero-extends in 64-bit
registers after writing to their lower 32-bit half.
-Enabled for Alpha, AArch64, PowerPC, RISC-V, SPARC, h83000 and x86 at levels
-@option{-O2}, @option{-O3}, @option{-Os}.
+Enabled for Alpha, AArch64, LoongArch, PowerPC, RISC-V, SPARC, h83000 and x86 at
+levels @option{-O2}, @option{-O3}, @option{-Os}.
@opindex fno-lifetime-dse
@opindex flifetime-dse
new file mode 100644
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mabi=lp64d -O2" } */
+/* { dg-final { scan-assembler-times "slli.w" 1 } } */
+
+extern int PL_savestack_ix;
+extern int PL_regsize;
+extern int PL_savestack_max;
+void Perl_savestack_grow_cnt (int need);
+extern void Perl_croak (char *);
+
+int
+S_regcppush(int parenfloor)
+{
+ int retval = PL_savestack_ix;
+ int paren_elems_to_push = (PL_regsize - parenfloor) * 4;
+ int p;
+
+ if (paren_elems_to_push < 0)
+ Perl_croak ("panic: paren_elems_to_push < 0");
+
+ if (PL_savestack_ix + (paren_elems_to_push + 6) > PL_savestack_max)
+ Perl_savestack_grow_cnt (paren_elems_to_push + 6);
+
+ return retval;
+}