rs6000: mark tieable between INT and FLOAT

Message ID 20230828030715.2310469-1-guojiufu@linux.ibm.com
State Accepted
Headers
Series rs6000: mark tieable between INT and FLOAT |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Jiufu Guo Aug. 28, 2023, 3:07 a.m. UTC
  Hi,

For PowerPC, some INT mode and FLOAT modes can be marked as tieable,
for example: DI<->DF.
One note SFmode is special, it would only tieable with itself.

I updated previous patch more reasonable:
https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609504.html

Bootstrap and regtest pass on ppc64{,le}.
Is this ok for trunk?

BR,
Jeff (Jiufu)

gcc/ChangeLog:

	* config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Mark more tieable
	modes.

gcc/testsuite/ChangeLog:

	* g++.target/powerpc/pr102024.C: Updated.

---
 gcc/config/rs6000/rs6000.cc                 | 9 +++++++++
 gcc/testsuite/g++.target/powerpc/pr102024.C | 3 ++-
 2 files changed, 11 insertions(+), 1 deletion(-)
  

Comments

Jiufu Guo Sept. 18, 2023, 3:48 a.m. UTC | #1
Hi,

I would like to have a ping.....

BR,
Jeff (Jiufu Guo)

Jiufu Guo <guojiufu@linux.ibm.com> writes:

> Hi,
>
> For PowerPC, some INT mode and FLOAT modes can be marked as tieable,
> for example: DI<->DF.
> One note SFmode is special, it would only tieable with itself.
>
> I updated previous patch more reasonable:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609504.html
>
> Bootstrap and regtest pass on ppc64{,le}.
> Is this ok for trunk?
>
> BR,
> Jeff (Jiufu)
>
> gcc/ChangeLog:
>
> 	* config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Mark more tieable
> 	modes.
>
> gcc/testsuite/ChangeLog:
>
> 	* g++.target/powerpc/pr102024.C: Updated.
>
> ---
>  gcc/config/rs6000/rs6000.cc                 | 9 +++++++++
>  gcc/testsuite/g++.target/powerpc/pr102024.C | 3 ++-
>  2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index 6ac3adcec6b..3cb0186089e 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -1968,6 +1968,15 @@ rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
>    if (ALTIVEC_OR_VSX_VECTOR_MODE (mode2))
>      return false;
>  
> +  /* SFmode format (IEEE DP) in register would not as required,
> +     So SFmode is restrict here.  */
> +  if (GET_MODE_CLASS (mode1) == MODE_FLOAT
> +      && GET_MODE_CLASS (mode2) == MODE_INT)
> +    return GET_MODE_SIZE (mode1) == UNITS_PER_FP_WORD;
> +  if (GET_MODE_CLASS (mode1) == MODE_INT
> +      && GET_MODE_CLASS (mode2) == MODE_FLOAT)
> +    return GET_MODE_SIZE (mode2) == UNITS_PER_FP_WORD;
> +
>    if (SCALAR_FLOAT_MODE_P (mode1))
>      return SCALAR_FLOAT_MODE_P (mode2);
>    if (SCALAR_FLOAT_MODE_P (mode2))
> diff --git a/gcc/testsuite/g++.target/powerpc/pr102024.C b/gcc/testsuite/g++.target/powerpc/pr102024.C
> index 769585052b5..27d2dc5e80b 100644
> --- a/gcc/testsuite/g++.target/powerpc/pr102024.C
> +++ b/gcc/testsuite/g++.target/powerpc/pr102024.C
> @@ -5,7 +5,8 @@
>  // Test that a zero-width bit field in an otherwise homogeneous aggregate
>  // generates a psabi warning and passes arguments in GPRs.
>  
> -// { dg-final { scan-assembler-times {\mstd\M} 4 } }
> +// { dg-final { scan-assembler-times {\mmtvsrd\M} 4 { target has_arch_pwr8 } } }
> +// { dg-final { scan-assembler-times {\mstd\M} 4 { target { ! has_arch_pwr8 } } } }
>  
>  struct a_thing
>  {
  

Patch

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 6ac3adcec6b..3cb0186089e 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1968,6 +1968,15 @@  rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
   if (ALTIVEC_OR_VSX_VECTOR_MODE (mode2))
     return false;
 
+  /* SFmode format (IEEE DP) in register would not as required,
+     So SFmode is restrict here.  */
+  if (GET_MODE_CLASS (mode1) == MODE_FLOAT
+      && GET_MODE_CLASS (mode2) == MODE_INT)
+    return GET_MODE_SIZE (mode1) == UNITS_PER_FP_WORD;
+  if (GET_MODE_CLASS (mode1) == MODE_INT
+      && GET_MODE_CLASS (mode2) == MODE_FLOAT)
+    return GET_MODE_SIZE (mode2) == UNITS_PER_FP_WORD;
+
   if (SCALAR_FLOAT_MODE_P (mode1))
     return SCALAR_FLOAT_MODE_P (mode2);
   if (SCALAR_FLOAT_MODE_P (mode2))
diff --git a/gcc/testsuite/g++.target/powerpc/pr102024.C b/gcc/testsuite/g++.target/powerpc/pr102024.C
index 769585052b5..27d2dc5e80b 100644
--- a/gcc/testsuite/g++.target/powerpc/pr102024.C
+++ b/gcc/testsuite/g++.target/powerpc/pr102024.C
@@ -5,7 +5,8 @@ 
 // Test that a zero-width bit field in an otherwise homogeneous aggregate
 // generates a psabi warning and passes arguments in GPRs.
 
-// { dg-final { scan-assembler-times {\mstd\M} 4 } }
+// { dg-final { scan-assembler-times {\mmtvsrd\M} 4 { target has_arch_pwr8 } } }
+// { dg-final { scan-assembler-times {\mstd\M} 4 { target { ! has_arch_pwr8 } } } }
 
 struct a_thing
 {