RISC-V: Add early continue for ENTRY and EXIT block

Message ID 20230825015919.3478297-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V: Add early continue for ENTRY and EXIT block |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Aug. 25, 2023, 1:59 a.m. UTC
  Committed.

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties): Add early continue.

---
 gcc/config/riscv/riscv-vsetvl.cc | 2 ++
 1 file changed, 2 insertions(+)
  

Patch

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index f7558cad2e2..7923702144c 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -3720,6 +3720,8 @@  pass_vsetvl::compute_local_properties (void)
   for (const bb_info *bb : crtl->ssa->bbs ())
     {
       unsigned int curr_bb_idx = bb->index ();
+      if (curr_bb_idx == ENTRY_BLOCK || curr_bb_idx == EXIT_BLOCK)
+	continue;
       const auto local_dem
 	= m_vector_manager->vector_block_infos[curr_bb_idx].local_dem;
       const auto reaching_out