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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id x19-20020aa7d6d3000000b00524035e56afsi9838327edr.105.2023.08.24.00.41.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 00:41:21 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=roX3cu1v; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1D566385C6FE for ; Thu, 24 Aug 2023 07:41:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1D566385C6FE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1692862877; bh=jABVJZ8hqQEmTZ6M7sKMUwHlre+eMAuHdhqdO932Yfg=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=roX3cu1v2c8jEpu6YEQuWXw+WXVSbuAbkmU3NCsjcRCFgAvUavBFTjkZVJDZGuN8v 6J2KGWNhEnwp1jW26zotOeOQMSGrMWlmLb8+uRBjSconU7b/MGYa5nAq8iZauBFUwA N2d2DFKbzv2B/n8V7TWNwJ//RdxcQ27la1rwckBw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id 10E143858C53 for ; Thu, 24 Aug 2023 07:40:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 10E143858C53 X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="359353190" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="359353190" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Aug 2023 00:37:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="713863019" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="713863019" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga006.jf.intel.com with ESMTP; 24 Aug 2023 00:37:50 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id E12671007812; Thu, 24 Aug 2023 15:37:49 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v1] RISC-V: Fix one typo in autovec.md pattern comment Date: Thu, 24 Aug 2023 15:37:47 +0800 Message-Id: <20230824073747.315274-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_ASCII_DIVIDERS, MEDICAL_SUBJECT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Pan Li via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: pan2.li@intel.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1775095388636800907 X-GMAIL-MSGID: 1775095388636800907 From: Pan Li Fix below typo for the pattern comment. vfmsac => vfnmsac vfmsub => vfnmsub Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/autovec.md: Fix typo. Signed-off-by: Pan Li > --- gcc/config/riscv/autovec.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index d9f1a10eb66..18950ac7c4f 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -1258,11 +1258,11 @@ (define_insn_and_split "*fms" (set (attr "frm_mode") (symbol_ref "riscv_vector::FRM_DYN"))]) ;; ------------------------------------------------------------------------- -;; ---- [FP] VFMSAC and VFMSUB +;; ---- [FP] VFNMSAC and VFNMSUB ;; ------------------------------------------------------------------------- ;; Includes: -;; - vfmsac -;; - vfmsub +;; - vfnmsac +;; - vfnmsub ;; ------------------------------------------------------------------------- (define_expand "fnms4"