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([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2023 23:57:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10803"; a="848779231" X-IronPort-AV: E=Sophos;i="6.01,179,1684825200"; d="scan'208";a="848779231" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga002.fm.intel.com with ESMTP; 16 Aug 2023 23:57:13 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 526B21005155; Thu, 17 Aug 2023 14:57:12 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH 2/2] [PATCH 2/2] Support AVX10.1 for AVX512DQ intrins Date: Thu, 17 Aug 2023 14:55:09 +0800 Message-Id: <20230817065509.130068-3-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230817065509.130068-1-haochen.jiang@intel.com> References: <20230817065509.130068-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1774458526249052201 X-GMAIL-MSGID: 1774458533688405826 gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_1-kaddb-1.c: New test. * gcc.target/i386/avx10_1-kaddw-1.c: Ditto. * gcc.target/i386/avx10_1-kandb-1.c: Ditto. * gcc.target/i386/avx10_1-kandnb-1.c: Ditto. * gcc.target/i386/avx10_1-kmovb-1.c: Ditto. * gcc.target/i386/avx10_1-kmovb-2.c: Ditto. * gcc.target/i386/avx10_1-kmovb-3.c: Ditto. * gcc.target/i386/avx10_1-kmovb-4.c: Ditto. * gcc.target/i386/avx10_1-knotb-1.c: Ditto. * gcc.target/i386/avx10_1-korb-1.c: Ditto. * gcc.target/i386/avx10_1-kortestb-1.c: Ditto. * gcc.target/i386/avx10_1-kshiftlb-1.c: Ditto. * gcc.target/i386/avx10_1-kshiftrb-1.c: Ditto. * gcc.target/i386/avx10_1-ktestb-1.c: Ditto. * gcc.target/i386/avx10_1-ktestw-1.c: Ditto. * gcc.target/i386/avx10_1-kxnorb-1.c: Ditto. * gcc.target/i386/avx10_1-kxorb-1.c: Ditto. * gcc.target/i386/avx10_1-vfpclasssd-1.c: New test. * gcc.target/i386/avx10_1-vfpclassss-1.c: Ditto. * gcc.target/i386/avx10_1-vpextr-1.c: Ditto. * gcc.target/i386/avx10_1-vpinsr-1.c: Ditto. * gcc.target/i386/avx10_1-vrangesd-1.c: Ditto. * gcc.target/i386/avx10_1-vrangess-1.c: Ditto. * gcc.target/i386/avx10_1-vreducesd-1.c: Ditto. * gcc.target/i386/avx10_1-vreducess-1.c: Ditto. --- .../gcc.target/i386/avx10_1-kaddb-1.c | 12 +++++ .../gcc.target/i386/avx10_1-kaddw-1.c | 12 +++++ .../gcc.target/i386/avx10_1-kandb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kandnb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kmovb-1.c | 15 ++++++ .../gcc.target/i386/avx10_1-kmovb-2.c | 16 ++++++ .../gcc.target/i386/avx10_1-kmovb-3.c | 17 ++++++ .../gcc.target/i386/avx10_1-kmovb-4.c | 15 ++++++ .../gcc.target/i386/avx10_1-knotb-1.c | 15 ++++++ .../gcc.target/i386/avx10_1-korb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kortestb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kshiftlb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kshiftrb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-ktestb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-ktestw-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kxnorb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-kxorb-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-vfpclasssd-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-vfpclassss-1.c | 16 ++++++ .../gcc.target/i386/avx10_1-vpextr-1.c | 53 +++++++++++++++++++ .../gcc.target/i386/avx10_1-vpinsr-1.c | 33 ++++++++++++ .../gcc.target/i386/avx10_1-vrangesd-1.c | 26 +++++++++ .../gcc.target/i386/avx10_1-vrangess-1.c | 25 +++++++++ .../gcc.target/i386/avx10_1-vreducesd-1.c | 31 +++++++++++ .../gcc.target/i386/avx10_1-vreducess-1.c | 30 +++++++++++ 25 files changed, 492 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kaddb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kaddw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kandb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kandnb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kmovb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kmovb-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kmovb-3.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kmovb-4.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-knotb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-korb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kortestb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kshiftlb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kshiftrb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-ktestb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-ktestw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kxnorb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-kxorb-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vfpclasssd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vfpclassss-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vpextr-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vpinsr-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vrangesd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vrangess-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vreducesd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vreducess-1.c diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kaddb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kaddb-1.c new file mode 100644 index 00000000000..6da7b497722 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kaddb-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kaddb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + __mmask8 k = _kadd_mask8 (11, 12); + asm volatile ("" : "+k" (k)); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kaddw-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kaddw-1.c new file mode 100644 index 00000000000..033b7005d71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kaddw-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kaddw\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + __mmask16 k = _kadd_mask16 (11, 12); + asm volatile ("" : "+k" (k)); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kandb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kandb-1.c new file mode 100644 index 00000000000..5510a982c97 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kandb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kandb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2, k3; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovb %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _kand_mask8 (k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kandnb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kandnb-1.c new file mode 100644 index 00000000000..e57078074e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kandnb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kandnb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2, k3; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovb %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _kandn_mask8 (k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-1.c new file mode 100644 index 00000000000..15b9d9a5daa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kmovb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include +volatile __mmask8 k1; + +void +avx10_1_test () +{ + __mmask8 k = _cvtu32_mask8 (11); + + asm volatile ("" : "+k" (k)); + k1 = k; +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-2.c b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-2.c new file mode 100644 index 00000000000..e4f73f0870e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-2.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kmovb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include +volatile __mmask8 k1; + +void +avx10_1_test () +{ + __mmask8 k0 = 11; + __mmask8 k = _load_mask8 (&k0); + + asm volatile ("" : "+k" (k)); + k1 = k; +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-3.c b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-3.c new file mode 100644 index 00000000000..47d4d1aafe2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kmovb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include +volatile __mmask8 k1 = 11; + +void +avx10_1_test () +{ + __mmask8 k0, k; + + _store_mask8 (&k, k1); + + asm volatile ("" : "+k" (k)); + k0 = k; +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-4.c b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-4.c new file mode 100644 index 00000000000..79effebdfc7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kmovb-4.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kmovb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include +volatile unsigned int i; + +void +avx10_1_test () +{ + __mmask8 k = 11; + + asm volatile ("" : "+k" (k)); + i = _cvtmask8_u32 (k); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-knotb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-knotb-1.c new file mode 100644 index 00000000000..4a353bcd921 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-knotb-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "knotb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (45) ); + + k2 = _knot_mask8 (k1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-korb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-korb-1.c new file mode 100644 index 00000000000..c912bec1482 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-korb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "korb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2, k3; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovb %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _kor_mask8 (k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kortestb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kortestb-1.c new file mode 100644 index 00000000000..9c8783f0bc5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kortestb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -mavx10.1" } */ +/* { dg-final { scan-assembler-times "kortestb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 2 } } */ + +#include + +void +avx10_1_test () { + volatile __mmask8 k1; + __mmask8 k2; + + volatile unsigned char r __attribute__((unused)); + + r = _kortestc_mask8_u8(k1, k2); + r = _kortestz_mask8_u8(k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kshiftlb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kshiftlb-1.c new file mode 100644 index 00000000000..54e8cfd98a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kshiftlb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kshiftlb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2; + unsigned int i = 5; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + + k2 = _kshiftli_mask8 (k1, i); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kshiftrb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kshiftrb-1.c new file mode 100644 index 00000000000..625007fded0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kshiftrb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kshiftrb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2; + unsigned int i = 5; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + + k2 = _kshiftri_mask8 (k1, i); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-ktestb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-ktestb-1.c new file mode 100644 index 00000000000..5f4fe298bd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-ktestb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -mavx10.1" } */ +/* { dg-final { scan-assembler-times "ktestb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 2 } } */ + +#include + +void +avx10_1_test () { + volatile __mmask8 k1; + __mmask8 k2; + + volatile unsigned char r __attribute__((unused)); + + r = _ktestc_mask8_u8(k1, k2); + r = _ktestz_mask8_u8(k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-ktestw-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-ktestw-1.c new file mode 100644 index 00000000000..c606abfb12b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-ktestw-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -mavx10.1" } */ +/* { dg-final { scan-assembler-times "ktestw\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 2 } } */ + +#include + +void +avx10_1_test () { + volatile __mmask16 k1; + __mmask16 k2; + + volatile unsigned char r __attribute__((unused)); + + r = _ktestc_mask16_u8(k1, k2); + r = _ktestz_mask16_u8(k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kxnorb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kxnorb-1.c new file mode 100644 index 00000000000..3abe56974bf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kxnorb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kxnorb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2, k3; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovb %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _kxnor_mask8 (k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-kxorb-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-kxorb-1.c new file mode 100644 index 00000000000..a39604f038b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-kxorb-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "kxorb\[ \\t\]+\[^\{\n\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +void +avx10_1_test () +{ + volatile __mmask8 k1, k2, k3; + + __asm__( "kmovb %1, %0" : "=k" (k1) : "r" (1) ); + __asm__( "kmovb %1, %0" : "=k" (k2) : "r" (2) ); + + k3 = _kxor_mask8 (k1, k2); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasssd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasssd-1.c new file mode 100644 index 00000000000..dbfbe421889 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasssd-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[0-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128d x128; +volatile __mmask8 m8; + +void extern +avx10_1_test (void) +{ + m8 = _mm_fpclass_sd_mask (x128, 13); + m8 = _mm_mask_fpclass_sd_mask (m8, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassss-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassss-1.c new file mode 100644 index 00000000000..20fd6d3c87b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassss-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclassss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclassss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[0-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128 x128; +volatile __mmask8 m8; + +void extern +avx10_1_test (void) +{ + m8 = _mm_fpclass_ss_mask (x128, 13); + m8 = _mm_mask_fpclass_ss_mask (m8, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vpextr-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vpextr-1.c new file mode 100644 index 00000000000..32fa2efa696 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vpextr-1.c @@ -0,0 +1,53 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mavx10.1" } */ + +typedef int v4si __attribute__((vector_size (16))); +typedef long long v2di __attribute__((vector_size (16))); + +unsigned int +f1 (v4si a) +{ + register v4si c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v4si d = c; + return ((unsigned int *) &d)[3]; +} + +unsigned long long +f2 (v2di a) +{ + register v2di c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v2di d = c; + return ((unsigned long long *) &d)[1]; +} + +unsigned long long +f3 (v4si a) +{ + register v4si c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v4si d = c; + return ((unsigned int *) &d)[3]; +} + +void +f4 (v4si a, unsigned int *p) +{ + register v4si c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v4si d = c; + *p = ((unsigned int *) &d)[3]; +} + +void +f5 (v2di a, unsigned long long *p) +{ + register v2di c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v2di d = c; + *p = ((unsigned long long *) &d)[1]; +} + +/* { dg-final { scan-assembler-times "vpextrd\[^\n\r]*xmm16" 3 } } */ +/* { dg-final { scan-assembler-times "vpextrq\[^\n\r]*xmm16" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vpinsr-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vpinsr-1.c new file mode 100644 index 00000000000..e473ddb64fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vpinsr-1.c @@ -0,0 +1,33 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mavx10.1" } */ + +typedef int v4si __attribute__((vector_size (16))); +typedef long long v2di __attribute__((vector_size (16))); + +v4si +f1 (v4si a, int b) +{ + register v4si c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v4si d = c; + ((int *) &d)[3] = b; + c = d; + asm volatile ("" : "+v" (c)); + return c; +} + +/* { dg-final { scan-assembler "vpinsrd\[^\n\r]*xmm16" } } */ + +v2di +f2 (v2di a, long long b) +{ + register v2di c __asm ("xmm16") = a; + asm volatile ("" : "+v" (c)); + v2di d = c; + ((long long *) &d)[1] = b; + c = d; + asm volatile ("" : "+v" (c)); + return c; +} + +/* { dg-final { scan-assembler "vpinsrq\[^\n\r]*xmm16" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangesd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangesd-1.c new file mode 100644 index 00000000000..4a388643a52 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangesd-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + + +#include + +volatile __m128d x1, x2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + x1 = _mm_range_sd (x1, x2, 3); + x1 = _mm_mask_range_sd (x1, m, x1, x2, 3); + x1 = _mm_maskz_range_sd (m, x1, x2, 3); + + x1 = _mm_range_round_sd (x1, x2, 3, _MM_FROUND_NO_EXC); + x1 = _mm_mask_range_round_sd (x1, m, x1, x2, 3, _MM_FROUND_NO_EXC); + x1 = _mm_maskz_range_round_sd (m, x1, x2, 3, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangess-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangess-1.c new file mode 100644 index 00000000000..f704ab95056 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangess-1.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m128 x1, x2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + x1 = _mm_range_ss (x1, x2, 1); + x1 = _mm_mask_range_ss (x1, m, x1, x2, 1); + x1 = _mm_maskz_range_ss (m, x1, x2, 1); + + x1 = _mm_range_round_ss (x1, x2, 1, _MM_FROUND_NO_EXC); + x1 = _mm_mask_range_round_ss (x1, m, x1, x2, 1, _MM_FROUND_NO_EXC); + x1 = _mm_maskz_range_round_ss (m, x1, x2, 1, _MM_FROUND_NO_EXC); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreducesd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreducesd-1.c new file mode 100644 index 00000000000..5953466c372 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreducesd-1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ + +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducesd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + + +#include + +#define IMM 123 + +volatile __m128d x1, x2, xx1, xx2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + xx1 = _mm_reduce_round_sd (xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_reduce_sd (x1, x2, IMM); + + xx1 = _mm_mask_reduce_round_sd(xx1, m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_mask_reduce_sd(x1, m, x1, x2, IMM); + + xx1 = _mm_maskz_reduce_round_sd(m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_maskz_reduce_sd(m, x1, x2, IMM); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreducess-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreducess-1.c new file mode 100644 index 00000000000..edd7ec07923 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreducess-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ + +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducess\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +#define IMM 123 + +volatile __m128 x1, x2, xx1, xx2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + xx1 = _mm_reduce_round_ss (xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_reduce_ss (x1, x2, IMM); + + xx1 = _mm_mask_reduce_round_ss (xx1, m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_mask_reduce_ss (x1, m, x1, x2, IMM); + + xx1 = _mm_maskz_reduce_round_ss (m, xx1, xx2, IMM, _MM_FROUND_NO_EXC); + x1 = _mm_maskz_reduce_ss (m, x1, x2, IMM); +}