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[8.43.85.97]) by mx.google.com with ESMTPS id z22-20020a170906715600b0099bd0f172b0si8120703ejj.1036.2023.08.14.11.36.18 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 11:36:18 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=fJ54xK2N; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7F5383852763 for ; Mon, 14 Aug 2023 18:35:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7F5383852763 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1692038124; bh=G0sGkrT9o+Quxz7nXbLKwlXKVk3BNgaaCCKtpkVzaYA=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=fJ54xK2NTU0T6TR0vkz7wAkzLK0oR/g68+XNS4UVugFcCtQA/aoL2050tYN0v9UkM oWC23M/xEm0Leh97cU9Fs7QM1KWCqQBsEMJy+VARMo3WThjXERTF1atP48KYlPmcF0 RIiSndWGbst8HKqhEO8xb70k0uDFqHhZ14L4NGIw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oa1-x32.google.com (mail-oa1-x32.google.com [IPv6:2001:4860:4864:20::32]) by sourceware.org (Postfix) with ESMTPS id E22C13858417 for ; Mon, 14 Aug 2023 18:34:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E22C13858417 Received: by mail-oa1-x32.google.com with SMTP id 586e51a60fabf-1ba5cda3530so3577331fac.3 for ; Mon, 14 Aug 2023 11:34:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692038075; x=1692642875; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=G0sGkrT9o+Quxz7nXbLKwlXKVk3BNgaaCCKtpkVzaYA=; b=DX/r8UWjNaihE+/wbP2jl+vsjsHFcF7E9SC77w4ZfN7RTwnQ4ZqWRIsSNElDNR8g8K 1Y9wjDKgUZy4oGtqnBmj9r93QQdSQgIPObQei/2oZQ/pGrEhE1/GsMWf8s9ENzIFPzB8 8BebA/zFKkSshQ1UG4O3ON5Ci3hIVfTfdWkdBd/v6YAaBqbREDteZaOldJf1S//eMd4S iDnjn+IC3JSHyK46PokIh2McRr3WiDZwXG1y+HxVixNBHW1H9egjDBokELyzESNLnUcd 0F5T+en5ddUT9rbmFES4SFPGdIcQShY7cx4n89T7+9O4RjTX+1U+/fXiFY2UxWKSxvcJ cKAw== X-Gm-Message-State: AOJu0YzlZGqNBvtJZCnPPqETHGxJUiNkbg/EqzPzHtqEUZlxHAHN6/b1 amKpKJwjFkOzAFumlMXck6FP5sSfBHEcaLGUcp2beyFP X-Received: by 2002:a05:6871:554:b0:1bf:77d4:1c7 with SMTP id t20-20020a056871055400b001bf77d401c7mr10678915oal.13.1692038075438; Mon, 14 Aug 2023 11:34:35 -0700 (PDT) Received: from localhost.localdomain ([139.178.84.207]) by smtp.gmail.com with ESMTPSA id l22-20020a056870e91600b001bec2a8f4e3sm5451968oan.14.2023.08.14.11.34.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 11:34:35 -0700 (PDT) To: gcc-patches@gcc.gnu.org, Kyrylo.Tkachov@arm.com, richard.earnshaw@arm.com, richard.sandiford@arm.com Cc: Christophe Lyon Subject: [PATCH 1/9] arm: [MVE intrinsics] factorize vmullbq vmulltq Date: Mon, 14 Aug 2023 18:34:14 +0000 Message-Id: <20230814183422.1905511-1-christophe.lyon@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Christophe Lyon via Gcc-patches From: Christophe Lyon Reply-To: Christophe Lyon Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1774230625038715408 X-GMAIL-MSGID: 1774230625038715408 Factorize vmullbq, vmulltq so that they use the same parameterized names. 2023-08-14 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add vmullb, vmullt. (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S, VMULLTQ_INT_U. (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P, VMULLTQ_POLY_M_P. (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete. (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New. * config/arm/mve.md (mve_vmullbq_int_) (mve_vmulltq_int_): Merge into ... (@mve_q_int_) ... this. (mve_vmulltq_poly_p, mve_vmullbq_poly_p): Merge into ... (@mve_q_poly_): ... this. (mve_vmullbq_int_m_, mve_vmulltq_int_m_): Merge into ... (@mve_q_int_m_): ... this. (mve_vmullbq_poly_m_p, mve_vmulltq_poly_m_p): Merge into ... (@mve_q_poly_m_): ... this. --- gcc/config/arm/iterators.md | 23 +++++++-- gcc/config/arm/mve.md | 100 ++++++++---------------------------- 2 files changed, 38 insertions(+), 85 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index b13ff53d36f..fb003bcd67b 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -917,6 +917,7 @@ (define_int_attr mve_insn [ (UNSPEC_VCADD90 "vcadd") (UNSPEC_VCADD270 "vcadd") + (UNSPEC_VCMLA "vcmla") (UNSPEC_VCMLA90 "vcmla") (UNSPEC_VCMLA180 "vcmla") (UNSPEC_VCMLA270 "vcmla") (UNSPEC_VCMUL "vcmul") (UNSPEC_VCMUL90 "vcmul") (UNSPEC_VCMUL180 "vcmul") (UNSPEC_VCMUL270 "vcmul") (VABAVQ_P_S "vabav") (VABAVQ_P_U "vabav") (VABAVQ_S "vabav") (VABAVQ_U "vabav") @@ -1044,6 +1045,13 @@ (VMOVNTQ_S "vmovnt") (VMOVNTQ_U "vmovnt") (VMULHQ_M_S "vmulh") (VMULHQ_M_U "vmulh") (VMULHQ_S "vmulh") (VMULHQ_U "vmulh") + (VMULLBQ_INT_M_S "vmullb") (VMULLBQ_INT_M_U "vmullb") + (VMULLBQ_INT_S "vmullb") (VMULLBQ_INT_U "vmullb") + (VMULLBQ_POLY_M_P "vmullb") (VMULLTQ_POLY_M_P "vmullt") + (VMULLBQ_POLY_P "vmullb") + (VMULLTQ_INT_M_S "vmullt") (VMULLTQ_INT_M_U "vmullt") + (VMULLTQ_INT_S "vmullt") (VMULLTQ_INT_U "vmullt") + (VMULLTQ_POLY_P "vmullt") (VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul") (VMULQ_M_S "vmul") (VMULQ_M_U "vmul") (VMULQ_M_F "vmul") (VMULQ_N_S "vmul") (VMULQ_N_U "vmul") (VMULQ_N_F "vmul") @@ -1209,7 +1217,6 @@ (VSUBQ_M_N_S "vsub") (VSUBQ_M_N_U "vsub") (VSUBQ_M_N_F "vsub") (VSUBQ_M_S "vsub") (VSUBQ_M_U "vsub") (VSUBQ_M_F "vsub") (VSUBQ_N_S "vsub") (VSUBQ_N_U "vsub") (VSUBQ_N_F "vsub") - (UNSPEC_VCMLA "vcmla") (UNSPEC_VCMLA90 "vcmla") (UNSPEC_VCMLA180 "vcmla") (UNSPEC_VCMLA270 "vcmla") ]) (define_int_attr isu [ @@ -1246,6 +1253,8 @@ (VMOVNBQ_S "i") (VMOVNBQ_U "i") (VMOVNTQ_M_S "i") (VMOVNTQ_M_U "i") (VMOVNTQ_S "i") (VMOVNTQ_U "i") + (VMULLBQ_INT_S "s") (VMULLBQ_INT_U "u") + (VMULLTQ_INT_S "s") (VMULLTQ_INT_U "u") (VNEGQ_M_S "s") (VQABSQ_M_S "s") (VQMOVNBQ_M_S "s") (VQMOVNBQ_M_U "u") @@ -2330,6 +2339,10 @@ (VMLADAVQ_U "u") (VMULHQ_S "s") (VMULHQ_U "u") (VMULLBQ_INT_S "s") (VMULLBQ_INT_U "u") (VQADDQ_S "s") (VMULLTQ_INT_S "s") (VMULLTQ_INT_U "u") (VQADDQ_U "u") + (VMULLBQ_POLY_P "p") + (VMULLTQ_POLY_P "p") + (VMULLBQ_POLY_M_P "p") + (VMULLTQ_POLY_M_P "p") (VMULQ_N_S "s") (VMULQ_N_U "u") (VMULQ_S "s") (VMULQ_U "u") (VQADDQ_N_S "s") (VQADDQ_N_U "u") @@ -2713,8 +2726,8 @@ (define_int_iterator VMINVQ [VMINVQ_U VMINVQ_S]) (define_int_iterator VMLADAVQ [VMLADAVQ_U VMLADAVQ_S]) (define_int_iterator VMULHQ [VMULHQ_S VMULHQ_U]) -(define_int_iterator VMULLBQ_INT [VMULLBQ_INT_U VMULLBQ_INT_S]) -(define_int_iterator VMULLTQ_INT [VMULLTQ_INT_U VMULLTQ_INT_S]) +(define_int_iterator VMULLxQ_INT [VMULLBQ_INT_U VMULLBQ_INT_S VMULLTQ_INT_U VMULLTQ_INT_S]) +(define_int_iterator VMULLxQ_POLY [VMULLBQ_POLY_P VMULLTQ_POLY_P]) (define_int_iterator VMULQ [VMULQ_U VMULQ_S]) (define_int_iterator VMULQ_N [VMULQ_N_U VMULQ_N_S]) (define_int_iterator VQADDQ [VQADDQ_U VQADDQ_S]) @@ -2815,7 +2828,8 @@ (define_int_iterator VSLIQ_M_N [VSLIQ_M_N_U VSLIQ_M_N_S]) (define_int_iterator VRSHLQ_M [VRSHLQ_M_S VRSHLQ_M_U]) (define_int_iterator VMINQ_M [VMINQ_M_S VMINQ_M_U]) -(define_int_iterator VMULLBQ_INT_M [VMULLBQ_INT_M_U VMULLBQ_INT_M_S]) +(define_int_iterator VMULLxQ_INT_M [VMULLBQ_INT_M_U VMULLBQ_INT_M_S VMULLTQ_INT_M_U VMULLTQ_INT_M_S]) +(define_int_iterator VMULLxQ_POLY_M [VMULLBQ_POLY_M_P VMULLTQ_POLY_M_P]) (define_int_iterator VMULHQ_M [VMULHQ_M_S VMULHQ_M_U]) (define_int_iterator VMULQ_M [VMULQ_M_S VMULQ_M_U]) (define_int_iterator VHSUBQ_M_N [VHSUBQ_M_N_S VHSUBQ_M_N_U]) @@ -2844,7 +2858,6 @@ (define_int_iterator VMLADAVAQ_P [VMLADAVAQ_P_U VMLADAVAQ_P_S]) (define_int_iterator VBRSRQ_M_N [VBRSRQ_M_N_U VBRSRQ_M_N_S]) (define_int_iterator VMULQ_M_N [VMULQ_M_N_U VMULQ_M_N_S]) -(define_int_iterator VMULLTQ_INT_M [VMULLTQ_INT_M_S VMULLTQ_INT_M_U]) (define_int_iterator VEORQ_M [VEORQ_M_S VEORQ_M_U]) (define_int_iterator VSHRQ_M_N [VSHRQ_M_N_S VSHRQ_M_N_U]) (define_int_iterator VSUBQ_M_N [VSUBQ_M_N_S VSUBQ_M_N_U]) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index a2cbcff1a6f..2001e95a5f1 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -976,32 +976,18 @@ ]) ;; -;; [vmullbq_int_u, vmullbq_int_s]) +;; [vmullbq_int_u, vmullbq_int_s] +;; [vmulltq_int_u, vmulltq_int_s] ;; -(define_insn "mve_vmullbq_int_" +(define_insn "@mve_q_int_" [ (set (match_operand: 0 "s_register_operand" "") (unspec: [(match_operand:MVE_2 1 "s_register_operand" "w") (match_operand:MVE_2 2 "s_register_operand" "w")] - VMULLBQ_INT)) + VMULLxQ_INT)) ] "TARGET_HAVE_MVE" - "vmullb.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vmulltq_int_u, vmulltq_int_s]) -;; -(define_insn "mve_vmulltq_int_" - [ - (set (match_operand: 0 "s_register_operand" "") - (unspec: [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VMULLTQ_INT)) - ] - "TARGET_HAVE_MVE" - "vmullt.%#\t%q0, %q1, %q2" + ".%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1528,32 +1514,18 @@ ]) ;; -;; [vmulltq_poly_p]) -;; -(define_insn "mve_vmulltq_poly_p" - [ - (set (match_operand: 0 "s_register_operand" "=w") - (unspec: [(match_operand:MVE_3 1 "s_register_operand" "w") - (match_operand:MVE_3 2 "s_register_operand" "w")] - VMULLTQ_POLY_P)) - ] - "TARGET_HAVE_MVE" - "vmullt.p%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vmullbq_poly_p]) +;; [vmulltq_poly_p] +;; [vmullbq_poly_p] ;; -(define_insn "mve_vmullbq_poly_p" +(define_insn "@mve_q_poly_" [ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand:MVE_3 1 "s_register_operand" "w") (match_operand:MVE_3 2 "s_register_operand" "w")] - VMULLBQ_POLY_P)) + VMULLxQ_POLY)) ] "TARGET_HAVE_MVE" - "vmullb.p%#\t%q0, %q1, %q2" + ".%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -2816,36 +2788,20 @@ (set_attr "length""8")]) ;; -;; [vmullbq_int_m_u, vmullbq_int_m_s]) +;; [vmullbq_int_m_u, vmullbq_int_m_s] +;; [vmulltq_int_m_s, vmulltq_int_m_u] ;; -(define_insn "mve_vmullbq_int_m_" +(define_insn "@mve_q_int_m_" [ (set (match_operand: 0 "s_register_operand" "") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_2 2 "s_register_operand" "w") (match_operand:MVE_2 3 "s_register_operand" "w") (match_operand: 4 "vpr_register_operand" "Up")] - VMULLBQ_INT_M)) + VMULLxQ_INT_M)) ] "TARGET_HAVE_MVE" - "vpst\;vmullbt.%# %q0, %q2, %q3" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - -;; -;; [vmulltq_int_m_s, vmulltq_int_m_u]) -;; -(define_insn "mve_vmulltq_int_m_" - [ - (set (match_operand: 0 "s_register_operand" "") - (unspec: [(match_operand: 1 "s_register_operand" "0") - (match_operand:MVE_2 2 "s_register_operand" "w") - (match_operand:MVE_2 3 "s_register_operand" "w") - (match_operand: 4 "vpr_register_operand" "Up")] - VMULLTQ_INT_M)) - ] - "TARGET_HAVE_MVE" - "vpst\;vmulltt.%# %q0, %q2, %q3" + "vpst\;t.%#\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3006,36 +2962,20 @@ (set_attr "length""8")]) ;; -;; [vmullbq_poly_m_p]) +;; [vmullbq_poly_m_p] +;; [vmulltq_poly_m_p] ;; -(define_insn "mve_vmullbq_poly_m_p" +(define_insn "@mve_q_poly_m_" [ (set (match_operand: 0 "s_register_operand" "=w") (unspec: [(match_operand: 1 "s_register_operand" "0") (match_operand:MVE_3 2 "s_register_operand" "w") (match_operand:MVE_3 3 "s_register_operand" "w") (match_operand: 4 "vpr_register_operand" "Up")] - VMULLBQ_POLY_M_P)) + VMULLxQ_POLY_M)) ] "TARGET_HAVE_MVE" - "vpst\;vmullbt.p%#\t%q0, %q2, %q3" - [(set_attr "type" "mve_move") - (set_attr "length""8")]) - -;; -;; [vmulltq_poly_m_p]) -;; -(define_insn "mve_vmulltq_poly_m_p" - [ - (set (match_operand: 0 "s_register_operand" "=w") - (unspec: [(match_operand: 1 "s_register_operand" "0") - (match_operand:MVE_3 2 "s_register_operand" "w") - (match_operand:MVE_3 3 "s_register_operand" "w") - (match_operand: 4 "vpr_register_operand" "Up")] - VMULLTQ_POLY_M_P)) - ] - "TARGET_HAVE_MVE" - "vpst\;vmulltt.p%#\t%q0, %q2, %q3" + "vpst\;t.%#\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")])