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Thu, 10 Aug 2023 14:56:07 +0000 (GMT) Received: from a8345010.lnxne.boe (unknown [9.152.108.100]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTPS; Thu, 10 Aug 2023 14:56:07 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Stefan Schulze Frielinghaus Subject: [PATCH] rtl-optimization/110939 Really fix narrow comparison of memory and constant Date: Thu, 10 Aug 2023 15:04:03 +0200 Message-ID: <20230810130402.752335-2-stefansf@linux.ibm.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 1q0yt-3MTWKPD1nx4L_CXtsiOT2vXuQA X-Proofpoint-ORIG-GUID: 1q0yt-3MTWKPD1nx4L_CXtsiOT2vXuQA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_11,2023-08-10_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 mlxlogscore=607 spamscore=0 mlxscore=0 impostorscore=0 phishscore=0 suspectscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308100124 X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Stefan Schulze Frielinghaus via Gcc-patches From: Stefan Schulze Frielinghaus Reply-To: Stefan Schulze Frielinghaus Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773854435711352073 X-GMAIL-MSGID: 1773854435711352073 In the former fix in commit 41ef5a34161356817807be3a2e51fbdbe575ae85 I completely missed the fact that the normal form of a generated constant for a mode with fewer bits than in HOST_WIDE_INT is a sign extended version of the actual constant. This even holds true for unsigned constants. Fixed by masking out the upper bits for the incoming constant and sign extending the resulting unsigned constant. Bootstrapped and regtested on x64 and s390x. Ok for mainline? While reading existing optimizations in combine I stumbled across two optimizations where either my intuition about the representation of unsigned integers via a const_int rtx is wrong, which then in turn would probably also mean that this patch is wrong, or that the optimizations are missed sometimes. In other words in the following I would assume that the upper bits are masked out: diff --git a/gcc/combine.cc b/gcc/combine.cc index 468b7fde911..80c4ff0fbaf 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -11923,7 +11923,7 @@ simplify_compare_const (enum rtx_code code, machine_mode mode, /* (unsigned) < 0x80000000 is equivalent to >= 0. */ else if (is_a (mode, &int_mode) && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT - && ((unsigned HOST_WIDE_INT) const_op + && (((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) == HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1))) { const_op = 0; @@ -11962,7 +11962,7 @@ simplify_compare_const (enum rtx_code code, machine_mode mode, /* (unsigned) >= 0x80000000 is equivalent to < 0. */ else if (is_a (mode, &int_mode) && GET_MODE_PRECISION (int_mode) - 1 < HOST_BITS_PER_WIDE_INT - && ((unsigned HOST_WIDE_INT) const_op + && (((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) == HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1))) { const_op = 0; For example, while bootstrapping on x64 the optimization is missed since a LTU comparison in QImode is done and the constant equals 0xffffffffffffff80. Sorry for inlining another patch, but I would really like to make sure that my understanding is correct, now, before I come up with another patch. Thus it would be great if someone could shed some light on this. gcc/ChangeLog: * combine.cc (simplify_compare_const): Properly handle unsigned constants while narrowing comparison of memory and constants. --- gcc/combine.cc | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/gcc/combine.cc b/gcc/combine.cc index e46d202d0a7..468b7fde911 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -12003,14 +12003,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode, && !MEM_VOLATILE_P (op0) /* The optimization makes only sense for constants which are big enough so that we have a chance to chop off something at all. */ - && (unsigned HOST_WIDE_INT) const_op > 0xff - /* Bail out, if the constant does not fit into INT_MODE. */ - && (unsigned HOST_WIDE_INT) const_op - < ((HOST_WIDE_INT_1U << (GET_MODE_PRECISION (int_mode) - 1) << 1) - 1) + && ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) > 0xff /* Ensure that we do not overflow during normalization. */ - && (code != GTU || (unsigned HOST_WIDE_INT) const_op < HOST_WIDE_INT_M1U)) + && (code != GTU + || ((unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode)) + < HOST_WIDE_INT_M1U) + && trunc_int_for_mode (const_op, int_mode) == const_op) { - unsigned HOST_WIDE_INT n = (unsigned HOST_WIDE_INT) const_op; + unsigned HOST_WIDE_INT n + = (unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode); enum rtx_code adjusted_code; /* Normalize code to either LEU or GEU. */ @@ -12051,15 +12052,15 @@ simplify_compare_const (enum rtx_code code, machine_mode mode, HOST_WIDE_INT_PRINT_HEX ") to (MEM %s " HOST_WIDE_INT_PRINT_HEX ").\n", GET_MODE_NAME (int_mode), GET_MODE_NAME (narrow_mode_iter), GET_RTX_NAME (code), - (unsigned HOST_WIDE_INT)const_op, GET_RTX_NAME (adjusted_code), - n); + (unsigned HOST_WIDE_INT) const_op & GET_MODE_MASK (int_mode), + GET_RTX_NAME (adjusted_code), n); } poly_int64 offset = (BYTES_BIG_ENDIAN ? 0 : (GET_MODE_SIZE (int_mode) - GET_MODE_SIZE (narrow_mode_iter))); *pop0 = adjust_address_nv (op0, narrow_mode_iter, offset); - *pop1 = GEN_INT (n); + *pop1 = gen_int_mode (n, narrow_mode_iter); return adjusted_code; } }