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08 Aug 2023 00:21:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="977746926" X-IronPort-AV: E=Sophos;i="6.01,263,1684825200"; d="scan'208";a="977746926" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga006.fm.intel.com with ESMTP; 08 Aug 2023 00:21:00 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 7CDB11005608; Tue, 8 Aug 2023 15:20:59 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com, hongtao.liu@intel.com Subject: [PATCH 6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins Date: Tue, 8 Aug 2023 15:20:59 +0800 Message-Id: <20230808072059.1570341-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230808071312.1569559-1-haochen.jiang@intel.com> References: <20230808071312.1569559-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773644548037755749 X-GMAIL-MSGID: 1773644748726874737 gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_1-vextractf64x2-1.c: New test. * gcc.target/i386/avx10_1-vextracti64x2-1.c: Ditto. * gcc.target/i386/avx10_1-vfpclasspd-1.c: Ditto. * gcc.target/i386/avx10_1-vfpclassps-1.c: Ditto. * gcc.target/i386/avx10_1-vinsertf64x2-1.c: Ditto. * gcc.target/i386/avx10_1-vinserti64x2-1.c: Ditto. * gcc.target/i386/avx10_1-vrangepd-1.c: Ditto. * gcc.target/i386/avx10_1-vrangeps-1.c: Ditto. * gcc.target/i386/avx10_1-vreducepd-1.c: Ditto. * gcc.target/i386/avx10_1-vreduceps-1.c: Ditto. --- .../gcc.target/i386/avx10_1-vextractf64x2-1.c | 18 ++++++++++++ .../gcc.target/i386/avx10_1-vextracti64x2-1.c | 19 ++++++++++++ .../gcc.target/i386/avx10_1-vfpclasspd-1.c | 21 ++++++++++++++ .../gcc.target/i386/avx10_1-vfpclassps-1.c | 21 ++++++++++++++ .../gcc.target/i386/avx10_1-vinsertf64x2-1.c | 18 ++++++++++++ .../gcc.target/i386/avx10_1-vinserti64x2-1.c | 18 ++++++++++++ .../gcc.target/i386/avx10_1-vrangepd-1.c | 27 +++++++++++++++++ .../gcc.target/i386/avx10_1-vrangeps-1.c | 27 +++++++++++++++++ .../gcc.target/i386/avx10_1-vreducepd-1.c | 29 +++++++++++++++++++ .../gcc.target/i386/avx10_1-vreduceps-1.c | 29 +++++++++++++++++++ 10 files changed, 227 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c new file mode 100644 index 00000000000..4c7e54dc198 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256d x; +volatile __m128d y; + +void extern +avx10_1_test (void) +{ + y = _mm256_extractf64x2_pd (x, 1); + y = _mm256_mask_extractf64x2_pd (y, 2, x, 1); + y = _mm256_maskz_extractf64x2_pd (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c new file mode 100644 index 00000000000..c0bd7700d52 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256i x; +volatile __m128i y; + +void extern +avx10_1_test (void) +{ + y = _mm256_extracti64x2_epi64 (x, 1); + y = _mm256_mask_extracti64x2_epi64 (y, 2, x, 1); + y = _mm256_maskz_extracti64x2_epi64 (2, x, 1); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c new file mode 100644 index 00000000000..806ba800023 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + m = _mm256_fpclass_pd_mask (x256, 13); + m = _mm_fpclass_pd_mask (x128, 13); + m = _mm256_mask_fpclass_pd_mask (2, x256, 13); + m = _mm_mask_fpclass_pd_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c new file mode 100644 index 00000000000..174903c7676 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + m = _mm256_fpclass_ps_mask (x256, 13); + m = _mm_fpclass_ps_mask (x128, 13); + m = _mm256_mask_fpclass_ps_mask (2, x256, 13); + m = _mm_mask_fpclass_ps_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c new file mode 100644 index 00000000000..5a196844e76 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256d x; +volatile __m128d y; + +void extern +avx10_1_test (void) +{ + x = _mm256_insertf64x2 (x, y, 1); + x = _mm256_mask_insertf64x2 (x, 2, x, y, 1); + x = _mm256_maskz_insertf64x2 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c new file mode 100644 index 00000000000..69ee06f0f08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256i x; +volatile __m128i y; + +void extern +avx10_1_test (void) +{ + x = _mm256_inserti64x2 (x, y, 1); + x = _mm256_mask_inserti64x2 (x, 2, x, y, 1); + x = _mm256_maskz_inserti64x2 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c new file mode 100644 index 00000000000..995b6de64ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + y = _mm256_range_pd (y, y, 15); + x = _mm_range_pd (x, x, 15); + + y = _mm256_mask_range_pd (y, m, y, y, 15); + x = _mm_mask_range_pd (x, m, x, x, 15); + + y = _mm256_maskz_range_pd (m, y, y, 15); + x = _mm_maskz_range_pd (m, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c new file mode 100644 index 00000000000..faf844a9ae1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + y = _mm256_range_ps (y, y, 15); + x = _mm_range_ps (x, x, 15); + + y = _mm256_mask_range_ps (y, m, y, y, 15); + x = _mm_mask_range_ps (x, m, x, x, 15); + + y = _mm256_maskz_range_ps (m, y, y, 15); + x = _mm_maskz_range_ps (m, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c new file mode 100644 index 00000000000..76bcec0d2f6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +#define IMM 123 + +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx156p_test (void) +{ + x1 = _mm256_reduce_pd (x1, IMM); + x2 = _mm_reduce_pd (x2, IMM); + + x1 = _mm256_mask_reduce_pd (x1, m, x1, IMM); + x2 = _mm_mask_reduce_pd (x2, m, x2, IMM); + + x1 = _mm256_maskz_reduce_pd (m, x1, IMM); + x2 = _mm_maskz_reduce_pd (m, x2, IMM); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c new file mode 100644 index 00000000000..9d3aeb362fc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +#define IMM 123 + +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + x1 = _mm256_reduce_ps (x1, IMM); + x2 = _mm_reduce_ps (x2, IMM); + + x1 = _mm256_mask_reduce_ps (x1, m, x1, IMM); + x2 = _mm_mask_reduce_ps (x2, m, x2, IMM); + + x1 = _mm256_maskz_reduce_ps (m, x1, IMM); + x2 = _mm_maskz_reduce_ps (m, x2, IMM); +}