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[8.43.85.97]) by mx.google.com with ESMTPS id le7-20020a170907170700b0099316735a60si6889083ejc.1042.2023.08.07.20.10.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Aug 2023 20:10:20 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=djsJH6cl; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 013AE3858423 for ; Tue, 8 Aug 2023 03:10:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 013AE3858423 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1691464219; bh=ehyxH+mmT4vWNAkR+dK+fB3qUmMhxLW7uYLLQiuqvBg=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=djsJH6clPYTh1pq0fT/IYQ/gAbvXF8CxmS0LrgTlRhfpGELhHv/26ux8vH7SLDqhi YsghlbcByNM8ev80JaoGQuqEYlZ2vwoMKZCqaEsjcM5K3yr8Lvy154FmBsqbSRLqHq rQlHhhvyFO4WDlDQLDBz9tdLvWtV3CIyjl2wlBkc= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id C979F3858D33 for ; Tue, 8 Aug 2023 03:09:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C979F3858D33 X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="373462790" X-IronPort-AV: E=Sophos;i="6.01,263,1684825200"; d="scan'208";a="373462790" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2023 20:09:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10795"; a="766202277" X-IronPort-AV: E=Sophos;i="6.01,263,1684825200"; d="scan'208";a="766202277" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga001.jf.intel.com with ESMTP; 07 Aug 2023 20:09:32 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id C2C181005188; Tue, 8 Aug 2023 11:09:31 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@sifive.com, pan2.li@intel.com, yanzhang.wang@intel.com, jeffreyalaw@gmail.com Subject: [PATCH v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER Date: Tue, 8 Aug 2023 11:09:29 +0800 Message-Id: <20230808030929.502310-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230807122247.1881775-1-pan2.li@intel.com> References: <20230807122247.1881775-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Pan Li via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: pan2.li@intel.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773628785857026388 X-GMAIL-MSGID: 1773628785857026388 From: Pan Li In same cases, like gcc/testsuite/gcc.dg/pr78148.c in RISC-V, there will be only 1 operand when SET_SRC in create_pre_exit. For example as below. (insn 13 9 14 2 (clobber (reg/i:TI 10 a0)) "gcc/testsuite/gcc.dg/pr78148.c":24:1 -1 (expr_list:REG_UNUSED (reg/i:TI 10 a0) (nil))) Unfortunately, SET_SRC requires at least 2 operands and then Segment Fault here. This patch would like to fix this ICE by ignoring the USE and CLOBBER insn before SET_SRC. Signed-off-by: Pan Li gcc/ChangeLog: * mode-switching.cc (create_pre_exit): Add USE and CLOBBER check. * rtl.h (CLOBBER_OR_USE_P): New macro. gcc/testsuite/ChangeLog: * gcc.target/riscv/mode-switch-ice-1.c: New test. --- gcc/mode-switching.cc | 1 + gcc/rtl.h | 4 ++++ .../gcc.target/riscv/mode-switch-ice-1.c | 22 +++++++++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/mode-switch-ice-1.c diff --git a/gcc/mode-switching.cc b/gcc/mode-switching.cc index 64ae2bc29c3..8bb016a811d 100644 --- a/gcc/mode-switching.cc +++ b/gcc/mode-switching.cc @@ -411,6 +411,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes) conflict with address reloads. */ if (copy_start >= ret_start && copy_start + copy_num <= ret_end + && !CLOBBER_OR_USE_P (return_copy_pat) && OBJECT_P (SET_SRC (return_copy_pat))) forced_late_switch = true; break; diff --git a/gcc/rtl.h b/gcc/rtl.h index e1c51156f90..cdc2941c210 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -1768,6 +1768,10 @@ extern const char * const reg_note_name[]; #define VAR_LOC_UNKNOWN_P(X) \ (GET_CODE (X) == CLOBBER && XEXP ((X), 0) == const0_rtx) +/* Determine whether RTX is USE or CLOBBER. */ +#define CLOBBER_OR_USE_P(RTX) \ + (GET_CODE (RTX) == USE || GET_CODE (RTX) == CLOBBER) + /* 1 if RTX is emitted after a call, but it should take effect before the call returns. */ #define NOTE_DURING_CALL_P(RTX) \ diff --git a/gcc/testsuite/gcc.target/riscv/mode-switch-ice-1.c b/gcc/testsuite/gcc.target/riscv/mode-switch-ice-1.c new file mode 100644 index 00000000000..1b34a471904 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mode-switch-ice-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +struct A { char e, f; }; + +struct B +{ + int g; + struct A h[4]; +}; + +extern void bar (int, int); + +struct B foo (void) +{ + bar (2, 1); +} + +void baz () +{ + foo (); +}