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(unknown [166.111.226.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) (Authenticated sender: c@jia.je) by hognose1.porkbun.com (Postfix) with ESMTPSA id 5219341AD0; Sun, 6 Aug 2023 12:51:09 +0000 (UTC) To: gcc-patches@gcc.gnu.org Cc: Jiajie Chen Subject: [PATCH 2/9] LoongArch: Fix default ISA setting Date: Sun, 6 Aug 2023 20:49:59 +0800 Message-ID: <20230806125010.283900-2-c@jia.je> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230806125010.283900-1-c@jia.je> References: <20230806125010.283900-1-c@jia.je> MIME-Version: 1.0 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiajie Chen via Gcc-patches From: Jiajie Chen Reply-To: Jiajie Chen Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773484237021978588 X-GMAIL-MSGID: 1773484237021978588 When loongarch_arch_target is called, la_target has not been initialized, thus the macro LARCH_ACTUAL_ARCH always equals to zero. This commit fixes by expanding the macro and reading the latest value. It permits -march=loongarch64 when the default target is loongarch32 and vice versa. gcc/ChangeLog: * config/loongarch/loongarch-opts.cc (loongarch_config_target): Fix -march detection. gcc/testsuite/ChangeLog: * gcc.target/loongarch/arch-1.c: New test. * gcc.target/loongarch/arch-2.c: New test. * gcc.target/loongarch/arch-3.c: New test. --- gcc/config/loongarch/loongarch-opts.cc | 5 ++++- gcc/testsuite/gcc.target/loongarch/arch-1.c | 5 +++++ gcc/testsuite/gcc.target/loongarch/arch-2.c | 5 +++++ gcc/testsuite/gcc.target/loongarch/arch-3.c | 6 ++++++ 4 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/arch-1.c create mode 100644 gcc/testsuite/gcc.target/loongarch/arch-2.c create mode 100644 gcc/testsuite/gcc.target/loongarch/arch-3.c diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc index 9fc0bbbcb6e..29c0c4468bb 100644 --- a/gcc/config/loongarch/loongarch-opts.cc +++ b/gcc/config/loongarch/loongarch-opts.cc @@ -246,7 +246,10 @@ loongarch_config_target (struct loongarch_target *target, config_target_isa: /* Get default ISA from "-march" or its default value. */ - t.isa = loongarch_cpu_default_isa[LARCH_ACTUAL_ARCH]; + if (t.cpu_arch == TARGET_ARCH_NATIVE) + t.isa = loongarch_cpu_default_isa[t.cpu_native]; + else + t.isa = loongarch_cpu_default_isa[t.cpu_arch]; /* Apply incremental changes. */ /* "-march=native" overrides the default FPU type. */ diff --git a/gcc/testsuite/gcc.target/loongarch/arch-1.c b/gcc/testsuite/gcc.target/loongarch/arch-1.c new file mode 100644 index 00000000000..379036ec76f --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/arch-1.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-march=loongarch64 -mabi=lp64d" } */ +int foo() +{ +} diff --git a/gcc/testsuite/gcc.target/loongarch/arch-2.c b/gcc/testsuite/gcc.target/loongarch/arch-2.c new file mode 100644 index 00000000000..55d646902a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/arch-2.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-march=loongarch32 -mabi=ilp32d" } */ +int foo() +{ +} diff --git a/gcc/testsuite/gcc.target/loongarch/arch-3.c b/gcc/testsuite/gcc.target/loongarch/arch-3.c new file mode 100644 index 00000000000..543b93883bd --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/arch-3.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-march=loongarch64 -mabi=ilp32d" } */ +int foo() +{ +} +/* { dg-error "unable to implement ABI 'ilp32d' with instruction set 'la64/fpu64'" "" { target *-*-* } 0 } */