diff mbox series

[v2] RISC-V: Fix RVV frm run test failure on RV32

Message ID 20230718024953.1343484-1-pan2.li@intel.com
State Unresolved
Headers
Series [v2] RISC-V: Fix RVV frm run test failure on RV32 |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Li, Pan2 via Gcc-patches July 18, 2023, 2:49 a.m. UTC 
  From: Pan Li <pan2.li@intel.com>

Refine the run test case to avoid interactive checking in RV32, by
separating each checks in different functions.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Fix run failure.
---
 .../riscv/rvv/base/float-point-frm-run-1.c    | 59 +++++++++++--------
 1 file changed, 36 insertions(+), 23 deletions(-)

Comments

juzhe.zhong@rivai.ai July 18, 2023, 2:53 a.m. UTC | #1 
LGTM.



juzhe.zhong@rivai.ai
 
From: pan2.li
Date: 2023-07-18 10:49
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v2] RISC-V: Fix RVV frm run test failure on RV32
From: Pan Li <pan2.li@intel.com>
 
Refine the run test case to avoid interactive checking in RV32, by
separating each checks in different functions.
 
Signed-off-by: Pan Li <pan2.li@intel.com>
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Fix run failure.
---
.../riscv/rvv/base/float-point-frm-run-1.c    | 59 +++++++++++--------
1 file changed, 36 insertions(+), 23 deletions(-)
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
index 245ce7d1fc0..1b2789a924b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
@@ -5,6 +5,24 @@
#include <stdio.h>
#include <stdint-gcc.h>
+#define DEFINE_TEST_FUNC(FRM) \
+vfloat32m1_t __attribute__ ((noinline)) \
+test_float_point_frm_run_##FRM (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) \
+{                                                                              \
+  vfloat32m1_t result;                                                         \
+                                                                               \
+  set_frm (0);                                                                 \
+                                                                               \
+  result = __riscv_vfadd_vv_f32m1_rm (op1, result, FRM, vl);                   \
+                                                                               \
+  assert_equal (FRM, get_frm (), "The value of frm should be " #FRM ".");      \
+                                                                               \
+  return result;                                                               \
+}
+
+#define RUN_TEST_FUNC(FRM, op1, op2, vl) \
+  test_float_point_frm_run_##FRM (op1, op2, vl)
+
static int
get_frm ()
{
@@ -41,28 +59,11 @@ assert_equal (int a, int b, char *message)
     }
}
-vfloat32m1_t __attribute__ ((noinline))
-test_float_point_frm_run (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl)
-{
-  vfloat32m1_t result;
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 1, vl);
-  assert_equal (1, get_frm (), "The value of frm register should be 1.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 2, vl);
-  assert_equal (2, get_frm (), "The value of frm register should be 2.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 3, vl);
-  assert_equal (3, get_frm (), "The value of frm register should be 3.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 4, vl);
-  assert_equal (4, get_frm (), "The value of frm register should be 4.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 0, vl);
-  assert_equal (0, get_frm (), "The value of frm register should be 0.");
-
-  return result;
-}
+DEFINE_TEST_FUNC (0)
+DEFINE_TEST_FUNC (1)
+DEFINE_TEST_FUNC (2)
+DEFINE_TEST_FUNC (3)
+DEFINE_TEST_FUNC (4)
int
main ()
@@ -72,8 +73,20 @@ main ()
   vfloat32m1_t op2;
   set_frm (4);
-  test_float_point_frm_run (op1, op2, vl);
+  RUN_TEST_FUNC (0, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (1, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (2, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (3, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (4, op1, op2, vl);
   assert_equal (4, get_frm (), "The value of frm register should be 4.");
   return 0;
-- 
2.34.1
Li, Pan2 via Gcc-patches July 18, 2023, 3:04 a.m. UTC | #2 
Committed, thanks Juzhe.

Pan

From: juzhe.zhong@rivai.ai <juzhe.zhong@rivai.ai>
Sent: Tuesday, July 18, 2023 10:53 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v2] RISC-V: Fix RVV frm run test failure on RV32

LGTM.
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
index 245ce7d1fc0..1b2789a924b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
@@ -5,6 +5,24 @@ 
 #include <stdio.h>
 #include <stdint-gcc.h>
 
+#define DEFINE_TEST_FUNC(FRM) \
+vfloat32m1_t __attribute__ ((noinline)) \
+test_float_point_frm_run_##FRM (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) \
+{                                                                              \
+  vfloat32m1_t result;                                                         \
+                                                                               \
+  set_frm (0);                                                                 \
+                                                                               \
+  result = __riscv_vfadd_vv_f32m1_rm (op1, result, FRM, vl);                   \
+                                                                               \
+  assert_equal (FRM, get_frm (), "The value of frm should be " #FRM ".");      \
+                                                                               \
+  return result;                                                               \
+}
+
+#define RUN_TEST_FUNC(FRM, op1, op2, vl) \
+  test_float_point_frm_run_##FRM (op1, op2, vl)
+
 static int
 get_frm ()
 {
@@ -41,28 +59,11 @@  assert_equal (int a, int b, char *message)
     }
 }
 
-vfloat32m1_t __attribute__ ((noinline))
-test_float_point_frm_run (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl)
-{
-  vfloat32m1_t result;
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 1, vl);
-  assert_equal (1, get_frm (), "The value of frm register should be 1.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 2, vl);
-  assert_equal (2, get_frm (), "The value of frm register should be 2.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 3, vl);
-  assert_equal (3, get_frm (), "The value of frm register should be 3.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 4, vl);
-  assert_equal (4, get_frm (), "The value of frm register should be 4.");
-
-  result = __riscv_vfadd_vv_f32m1_rm (op1, result, 0, vl);
-  assert_equal (0, get_frm (), "The value of frm register should be 0.");
-
-  return result;
-}
+DEFINE_TEST_FUNC (0)
+DEFINE_TEST_FUNC (1)
+DEFINE_TEST_FUNC (2)
+DEFINE_TEST_FUNC (3)
+DEFINE_TEST_FUNC (4)
 
 int
 main ()
@@ -72,8 +73,20 @@  main ()
   vfloat32m1_t op2;
 
   set_frm (4);
-  test_float_point_frm_run (op1, op2, vl);
 
+  RUN_TEST_FUNC (0, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (1, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (2, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (3, op1, op2, vl);
+  assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+  RUN_TEST_FUNC (4, op1, op2, vl);
   assert_equal (4, get_frm (), "The value of frm register should be 4.");
 
   return 0;