From patchwork Mon Jun 26 12:18:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "juzhe.zhong@rivai.ai" X-Patchwork-Id: 112900 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp7439189vqr; Mon, 26 Jun 2023 05:19:28 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7y8tTRXPR1xxQ1zuTZvaSTlUIwUSi+7ixaITPR3ixQPGSwO6ueNqBavfNOreQe/1Yhr/FR X-Received: by 2002:a17:907:a4a:b0:96a:30b5:cfb0 with SMTP id be10-20020a1709070a4a00b0096a30b5cfb0mr26774634ejc.22.1687781968403; Mon, 26 Jun 2023 05:19:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687781968; cv=none; d=google.com; s=arc-20160816; b=AsAnX05CwYQoq4X8zh15SWMVrROUCkp3N/sG1pD4XlH+ntQF5tpQXPh5UmC06J5OG1 +5JTXQUc2gbBmEJ+jYeX/EVtHBYZiawYYF3LRQz8VrIEnvV12fOxwMnLWNoSG4P5jrh4 fKeFV2907gzapzUHUFHzDXU+LjGS6y1e11XtLMGJOxFYKkevx8n0544MDxGIJgsZf20x YeuxwTme/59KArVmk2VOxyusmT+DcjT6ZWiCQ5XsEBl5Q78q77nWDYw+iT19dD3bmiJH J7EsKcJK9+1VraaI9DLwdA71GGNKcJ9PinQaF8Lr7ep7YPUKHUCSG8hfsn1YdTH5JUv7 qSIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:feedback-id :content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dmarc-filter:delivered-to; bh=oCf+crZ0pp78ewnpNF19ZtgboOjF/2zd+vhP9CNpJN0=; fh=wJQXjlF2pzwEVBXObiUXCE1/GsELYeDpatHPYmXU/Wc=; b=AL0N5BE5gKAweno/agXL6+kzYPFr7G85fNyicw3RiUUEdJhZunt9ZOPmR8Z6m1mTOI 0LpF52jBAboMWjjdBlluLuqELXH47ACX7ovAJQNCb6gMxjznyEtQ7cABNV9RYLanP6Nm /4QncHIiDd94FLMjQJBY5LcyWJ6ONj0yN6i0oJJjR5Le4Hq2uNeHlrqW+GS4yz6swpIc 6pCnOxCdvjzkek/ClMork1/dqYfnNSp5AhZsqYoEKxruxvLidewP5jcctXH3jCf162C6 o8QQYUuUdGo1kYAdxovY5YOS+2LZfe1W/YbEb5IchQGh4415lHE03ACbs7skbBD73J52 Mxlw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id bw17-20020a170906c1d100b00984713011c1si2696388ejb.306.2023.06.26.05.19.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jun 2023 05:19:28 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7776C38555B6 for ; Mon, 26 Jun 2023 12:18:44 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgeu1.qq.com (smtpbgeu1.qq.com [52.59.177.22]) by sourceware.org (Postfix) with ESMTPS id 7CA563858C00 for ; Mon, 26 Jun 2023 12:18:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7CA563858C00 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp78t1687781888t170j72d Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 26 Jun 2023 20:18:06 +0800 (CST) X-QQ-SSF: 01400000000000G0S000000A0000000 X-QQ-FEAT: /rrU+puPB7Rwm+/qqUXWDY3MNpuH5kAZPw6nZuEZsjsVXL7Tiz4TT5YrPwdyk MCviYDl35s9iSm7qH+rYIeCFLHZUFLC8qsHlSb7xO3x7w9Ozyf3vaEs4y3o/Gr2kd+5rrbE D9KEgGs0FZeXr1xgrVQiyH8RKG435IytZ41sO3LpwcO9XxvKqqduLz+/m1XDhhD41z0v3lB m59OO60cnEdYKMW+Kpjcfn2EI+UblwmRWmM8ysjVAZa28g2zIp67NuSMBTbWxvjyPvKIOlN Y1o9vRG28p7JoXhuT6DCz4VVhQHejGdIutYrn41BvPbNxjWNEa6l0/zK7pj1IOyuO8qdgL+ 2dkbnOUcTbPZ/i/xDJ2SbmHnpoPccKqwWi3e2TYuSe2Ifb1dGOmIyPbxsNdwcdLJKHnUFkf z4UAoPuDgDGxg9TCuPABtg== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 6003788399577986842 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, kito.cheng@sifive.com, palmer@dabbelt.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Juzhe-Zhong Subject: [PATCH V2] RISC-V: Support const vector expansion with step vector with base != 0 Date: Mon, 26 Jun 2023 20:18:04 +0800 Message-Id: <20230626121804.110219-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769767665726510428?= X-GMAIL-MSGID: =?utf-8?q?1769767665726510428?= Currently, we are able to generate step vector with base == 0: { 0, 0, 2, 2, 4, 4, ... } ASM: vid vand However, we do wrong for step vector with base != 0: { 1, 1, 3, 3, 5, 5, ... } Before this patch, such case will run fail. After this patch, we are able to pass the testcase and generate the step vector with asm: vid vand vadd gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector with base != 0. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/partial/slp-17.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp-18.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp-19.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp_run-17.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp_run-18.c: New test. * gcc.target/riscv/rvv/autovec/partial/slp_run-19.c: New test. --- gcc/config/riscv/riscv-v.cc | 14 +++- .../riscv/rvv/autovec/partial/slp-17.c | 34 ++++++++ .../riscv/rvv/autovec/partial/slp-18.c | 26 ++++++ .../riscv/rvv/autovec/partial/slp-19.c | 26 ++++++ .../riscv/rvv/autovec/partial/slp_run-17.c | 84 +++++++++++++++++++ .../riscv/rvv/autovec/partial/slp_run-18.c | 69 +++++++++++++++ .../riscv/rvv/autovec/partial/slp_run-19.c | 69 +++++++++++++++ 7 files changed, 320 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-18.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-19.c diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 5518394be1e..cd3422bf711 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -1258,7 +1258,6 @@ expand_const_vector (rtx target, rtx src) } emit_move_insn (target, tmp); } - return; } else if (CONST_VECTOR_STEPPED_P (src)) { @@ -1287,9 +1286,20 @@ expand_const_vector (rtx target, rtx src) */ rtx imm = gen_int_mode (-builder.npatterns (), builder.inner_mode ()); - rtx and_ops[] = {target, vid, imm}; + rtx tmp = gen_reg_rtx (builder.mode ()); + rtx and_ops[] = {tmp, vid, imm}; icode = code_for_pred_scalar (AND, builder.mode ()); emit_vlmax_insn (icode, RVV_BINOP, and_ops); + HOST_WIDE_INT init_val = INTVAL (builder.elt (0)); + if (init_val == 0) + emit_move_insn (target, tmp); + else + { + rtx dup = gen_const_vector_dup (builder.mode (), init_val); + rtx add_ops[] = {target, tmp, dup}; + icode = code_for_pred (PLUS, builder.mode ()); + emit_vlmax_insn (icode, RVV_BINOP, add_ops); + } } else { diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c new file mode 100644 index 00000000000..2f2c3d11c2a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-17.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -fdump-tree-optimized-details" } */ + +#include + +void +f (uint8_t *restrict a, uint8_t *restrict b, + uint8_t *restrict c, uint8_t *restrict d, + int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 8] = c[i * 8] + d[i * 8]; + a[i * 8 + 1] = c[i * 8] + d[i * 8 + 1]; + a[i * 8 + 2] = c[i * 8 + 2] + d[i * 8 + 2]; + a[i * 8 + 3] = c[i * 8 + 2] + d[i * 8 + 3]; + a[i * 8 + 4] = c[i * 8 + 4] + d[i * 8 + 4]; + a[i * 8 + 5] = c[i * 8 + 4] + d[i * 8 + 5]; + a[i * 8 + 6] = c[i * 8 + 6] + d[i * 8 + 6]; + a[i * 8 + 7] = c[i * 8 + 6] + d[i * 8 + 7]; + b[i * 8] = c[i * 8 + 1] + d[i * 8]; + b[i * 8 + 1] = c[i * 8 + 1] + d[i * 8 + 1]; + b[i * 8 + 2] = c[i * 8 + 3] + d[i * 8 + 2]; + b[i * 8 + 3] = c[i * 8 + 3] + d[i * 8 + 3]; + b[i * 8 + 4] = c[i * 8 + 5] + d[i * 8 + 4]; + b[i * 8 + 5] = c[i * 8 + 5] + d[i * 8 + 5]; + b[i * 8 + 6] = c[i * 8 + 7] + d[i * 8 + 6]; + b[i * 8 + 7] = c[i * 8 + 7] + d[i * 8 + 7]; + } +} + +/* { dg-final { scan-tree-dump-times "\.VEC_PERM" 2 "optimized" } } */ +/* { dg-final { scan-assembler {\tvid\.v} } } */ +/* { dg-final { scan-assembler-not {\tvmul} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c new file mode 100644 index 00000000000..72103314b1a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-18.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -fdump-tree-optimized-details" } */ + +#include + +void +f (float *restrict a, float *restrict b, + float *restrict c, float *restrict d, + int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 4] = c[i * 4] + d[i * 4]; + a[i * 4 + 1] = c[i * 4] + d[i * 4 + 1]; + a[i * 4 + 2] = c[i * 4 + 2] + d[i * 4 + 2]; + a[i * 4 + 3] = c[i * 4 + 2] + d[i * 4 + 3]; + b[i * 4] = c[i * 4 + 1] + d[i * 4]; + b[i * 4 + 1] = c[i * 4 + 1] + d[i * 4 + 1]; + b[i * 4 + 2] = c[i * 4 + 3] + d[i * 4 + 2]; + b[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + } +} + +/* { dg-final { scan-tree-dump "\.VEC_PERM" "optimized" } } */ +/* { dg-final { scan-assembler {\tvid\.v} } } */ +/* { dg-final { scan-assembler-not {\tvmul} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c new file mode 100644 index 00000000000..41ce0fc5767 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-19.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=scalable -fdump-tree-optimized-details" } */ + +#include + +void +f (float *restrict a, float *restrict b, + float *restrict c, float *restrict d, + int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 4] = c[i * 4] + d[i * 4]; + a[i * 4 + 1] = c[i * 4] + d[i * 4 + 1]; + a[i * 4 + 2] = c[i * 4 + 2] + d[i * 4 + 2]; + a[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + b[i * 4] = c[i * 4 + 2] + d[i * 4]; + b[i * 4 + 1] = c[i * 4 + 1] + d[i * 4 + 1]; + b[i * 4 + 2] = c[i * 4 + 3] + d[i * 4 + 2]; + b[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + } +} + +/* { dg-final { scan-tree-dump "\.VEC_PERM" "optimized" } } */ +/* { dg-final { scan-assembler {\tvid\.v} } } */ +/* { dg-final { scan-assembler-not {\tvmul} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-17.c new file mode 100644 index 00000000000..224db4e3173 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-17.c @@ -0,0 +1,84 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "--param riscv-autovec-preference=scalable" } */ + +#include "slp-17.c" + +#define LIMIT 256 +void __attribute__ ((optimize (0))) +f_golden (uint8_t *restrict a, uint8_t *restrict b, uint8_t *restrict c, + uint8_t *restrict d, int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 8] = c[i * 8] + d[i * 8]; + a[i * 8 + 1] = c[i * 8] + d[i * 8 + 1]; + a[i * 8 + 2] = c[i * 8 + 2] + d[i * 8 + 2]; + a[i * 8 + 3] = c[i * 8 + 2] + d[i * 8 + 3]; + a[i * 8 + 4] = c[i * 8 + 4] + d[i * 8 + 4]; + a[i * 8 + 5] = c[i * 8 + 4] + d[i * 8 + 5]; + a[i * 8 + 6] = c[i * 8 + 6] + d[i * 8 + 6]; + a[i * 8 + 7] = c[i * 8 + 6] + d[i * 8 + 7]; + b[i * 8] = c[i * 8 + 1] + d[i * 8]; + b[i * 8 + 1] = c[i * 8 + 1] + d[i * 8 + 1]; + b[i * 8 + 2] = c[i * 8 + 3] + d[i * 8 + 2]; + b[i * 8 + 3] = c[i * 8 + 3] + d[i * 8 + 3]; + b[i * 8 + 4] = c[i * 8 + 5] + d[i * 8 + 4]; + b[i * 8 + 5] = c[i * 8 + 5] + d[i * 8 + 5]; + b[i * 8 + 6] = c[i * 8 + 7] + d[i * 8 + 6]; + b[i * 8 + 7] = c[i * 8 + 7] + d[i * 8 + 7]; + } +} + +int +main (void) +{ +#define RUN(NUM) \ + uint8_t a_##NUM[NUM * 8 + 8] = {0}; \ + uint8_t a_golden_##NUM[NUM * 8 + 8] = {0}; \ + uint8_t b_##NUM[NUM * 8 + 8] = {0}; \ + uint8_t b_golden_##NUM[NUM * 8 + 8] = {0}; \ + uint8_t c_##NUM[NUM * 8 + 8] = {0}; \ + uint8_t d_##NUM[NUM * 8 + 8] = {0}; \ + for (int i = 0; i < NUM * 8 + 8; i++) \ + { \ + if (i % NUM == 0) \ + c_##NUM[i] = (i + NUM) % LIMIT; \ + else \ + c_##NUM[i] = (i * 3) % LIMIT; \ + if (i % 2 == 0) \ + d_##NUM[i] = i % LIMIT; \ + else \ + d_##NUM[i] = (i * 7) % LIMIT; \ + } \ + f (a_##NUM, b_##NUM, c_##NUM, d_##NUM, NUM); \ + f_golden (a_golden_##NUM, b_golden_##NUM, c_##NUM, d_##NUM, NUM); \ + for (int i = 0; i < NUM * 8 + 8; i++) \ + { \ + if (a_##NUM[i] != a_golden_##NUM[i]) \ + __builtin_abort (); \ + if (b_##NUM[i] != b_golden_##NUM[i]) \ + __builtin_abort (); \ + } + + RUN (3); + RUN (5); + RUN (15); + RUN (16); + RUN (17); + RUN (31); + RUN (32); + RUN (33); + RUN (63); + RUN (64); + RUN (65); + RUN (127); + RUN (128); + RUN (129); + RUN (239); + RUN (359); + RUN (498); + RUN (799); + RUN (977); + RUN (5789); + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-18.c new file mode 100644 index 00000000000..7d22e1fd88e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-18.c @@ -0,0 +1,69 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "--param riscv-autovec-preference=scalable" } */ + +#include "slp-18.c" + +void __attribute__ ((optimize (0))) +f_golden (float *restrict a, float *restrict b, float *restrict c, + float *restrict d, int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 4] = c[i * 4] + d[i * 4]; + a[i * 4 + 1] = c[i * 4] + d[i * 4 + 1]; + a[i * 4 + 2] = c[i * 4 + 2] + d[i * 4 + 2]; + a[i * 4 + 3] = c[i * 4 + 2] + d[i * 4 + 3]; + b[i * 4] = c[i * 4 + 1] + d[i * 4]; + b[i * 4 + 1] = c[i * 4 + 1] + d[i * 4 + 1]; + b[i * 4 + 2] = c[i * 4 + 3] + d[i * 4 + 2]; + b[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + } +} + +int +main (void) +{ +#define RUN(NUM) \ + float a_##NUM[NUM * 4 + 4] = {0}; \ + float a_golden_##NUM[NUM * 4 + 4] = {0}; \ + float b_##NUM[NUM * 4 + 4] = {0}; \ + float b_golden_##NUM[NUM * 4 + 4] = {0}; \ + float c_##NUM[NUM * 4 + 4] = {0}; \ + float d_##NUM[NUM * 4 + 4] = {0}; \ + for (int i = 0; i < NUM * 4 + 4; i++) \ + { \ + c_##NUM[i] = i * 3.789 - 987.135; \ + d_##NUM[i] = i * -13.789 + 1987.135; \ + } \ + f (a_##NUM, b_##NUM, c_##NUM, d_##NUM, NUM); \ + f_golden (a_golden_##NUM, b_golden_##NUM, c_##NUM, d_##NUM, NUM); \ + for (int i = 0; i < NUM * 4 + 4; i++) \ + { \ + if (a_##NUM[i] != a_golden_##NUM[i]) \ + __builtin_abort (); \ + if (b_##NUM[i] != b_golden_##NUM[i]) \ + __builtin_abort (); \ + } + + RUN (3); + RUN (5); + RUN (15); + RUN (16); + RUN (17); + RUN (31); + RUN (32); + RUN (33); + RUN (63); + RUN (64); + RUN (65); + RUN (127); + RUN (128); + RUN (129); + RUN (239); + RUN (359); + RUN (498); + RUN (799); + RUN (977); + RUN (5789); + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-19.c new file mode 100644 index 00000000000..5cd7156e3d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp_run-19.c @@ -0,0 +1,69 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "--param riscv-autovec-preference=scalable" } */ + +#include "slp-19.c" + +void __attribute__ ((optimize (0))) +f_golden (float *restrict a, float *restrict b, float *restrict c, + float *restrict d, int n) +{ + for (int i = 0; i < n; ++i) + { + a[i * 4] = c[i * 4] + d[i * 4]; + a[i * 4 + 1] = c[i * 4] + d[i * 4 + 1]; + a[i * 4 + 2] = c[i * 4 + 2] + d[i * 4 + 2]; + a[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + b[i * 4] = c[i * 4 + 2] + d[i * 4]; + b[i * 4 + 1] = c[i * 4 + 1] + d[i * 4 + 1]; + b[i * 4 + 2] = c[i * 4 + 3] + d[i * 4 + 2]; + b[i * 4 + 3] = c[i * 4 + 3] + d[i * 4 + 3]; + } +} + +int +main (void) +{ +#define RUN(NUM) \ + float a_##NUM[NUM * 4 + 4] = {0}; \ + float a_golden_##NUM[NUM * 4 + 4] = {0}; \ + float b_##NUM[NUM * 4 + 4] = {0}; \ + float b_golden_##NUM[NUM * 4 + 4] = {0}; \ + float c_##NUM[NUM * 4 + 4] = {0}; \ + float d_##NUM[NUM * 4 + 4] = {0}; \ + for (int i = 0; i < NUM * 4 + 4; i++) \ + { \ + c_##NUM[i] = i * 3.789 - 987.135; \ + d_##NUM[i] = i * -13.789 + 1987.135; \ + } \ + f (a_##NUM, b_##NUM, c_##NUM, d_##NUM, NUM); \ + f_golden (a_golden_##NUM, b_golden_##NUM, c_##NUM, d_##NUM, NUM); \ + for (int i = 0; i < NUM * 4 + 4; i++) \ + { \ + if (a_##NUM[i] != a_golden_##NUM[i]) \ + __builtin_abort (); \ + if (b_##NUM[i] != b_golden_##NUM[i]) \ + __builtin_abort (); \ + } + + RUN (3); + RUN (5); + RUN (15); + RUN (16); + RUN (17); + RUN (31); + RUN (32); + RUN (33); + RUN (63); + RUN (64); + RUN (65); + RUN (127); + RUN (128); + RUN (129); + RUN (239); + RUN (359); + RUN (498); + RUN (799); + RUN (977); + RUN (5789); + return 0; +}