tree-optimization/110332 - fix ICE with phiprop
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Commit Message
The following fixes an ICE that occurs when we visit an edge
inserted load from the code validating correctness for inserting
an aggregate copy there. We can simply skip those loads here.
Boostrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/110332
* tree-ssa-phiprop.cc (propagate_with_phi): Always
check aliasing with edge inserted loads.
* g++.dg/torture/pr110332.C: New testcase.
* gcc.dg/torture/pr110332-1.c: Likewise.
* gcc.dg/torture/pr110332-2.c: Likewise.
---
gcc/testsuite/g++.dg/torture/pr110332.C | 16 ++++++++++++++++
gcc/testsuite/gcc.dg/torture/pr110332-1.c | 13 +++++++++++++
gcc/testsuite/gcc.dg/torture/pr110332-2.c | 10 ++++++++++
gcc/tree-ssa-phiprop.cc | 10 +++++++---
4 files changed, 46 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/torture/pr110332.C
create mode 100644 gcc/testsuite/gcc.dg/torture/pr110332-1.c
create mode 100644 gcc/testsuite/gcc.dg/torture/pr110332-2.c
new file mode 100644
@@ -0,0 +1,16 @@
+// { dg-do compile }
+
+struct SlotIndex { int lie; };
+SlotIndex si7, si8;
+
+unsigned u9, u6;
+bool b3, b4;
+unsigned &value() {
+ return b4 ? u6 : u9;
+}
+void transferValues() {
+ unsigned RegIdx;
+ SlotIndex End;
+ RegIdx = value();
+ End = b3 ? si7 : si8;
+}
new file mode 100644
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+
+struct s { int lie; };
+struct s si7, si8;
+unsigned u9, u6;
+_Bool b3, b4;
+unsigned transferValues(struct s *End) {
+ unsigned RegIdx;
+ unsigned *t = b4 ? &u6 : &u9;
+ RegIdx = *t;
+ *End = *(b3 ? &si7 : &si8);
+ return RegIdx;
+}
new file mode 100644
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+
+_Bool a;
+struct s { int t; } c, d;
+unsigned e, f;
+unsigned transferValues(struct s *End) {
+ unsigned RegIdx = *(a ? &e : &f);
+ *End = *(a ? &c : &d);
+ return RegIdx;
+}
@@ -399,14 +399,18 @@ propagate_with_phi (basic_block bb, gphi *phi, struct phiprop_d *phivn,
there are no statements that could read from memory
aliasing the lhs in between the start of bb and use_stmt.
As we require use_stmt to have a VDEF above, loads after
- use_stmt will use a different virtual SSA_NAME. */
+ use_stmt will use a different virtual SSA_NAME. When
+ we reach an edge inserted load the constraints we place
+ on processing guarantees that program order is preserved
+ so we can avoid checking those. */
FOR_EACH_IMM_USE_FAST (vuse_p, vui, vuse)
{
vuse_stmt = USE_STMT (vuse_p);
if (vuse_stmt == use_stmt)
continue;
- if (!dominated_by_p (CDI_DOMINATORS,
- gimple_bb (vuse_stmt), bb))
+ if (!gimple_bb (vuse_stmt)
+ || !dominated_by_p (CDI_DOMINATORS,
+ gimple_bb (vuse_stmt), bb))
continue;
if (ref_maybe_used_by_stmt_p (vuse_stmt,
gimple_assign_lhs (use_stmt)))