From patchwork Wed Jun 14 07:29:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 107760 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1058740vqr; Wed, 14 Jun 2023 00:30:03 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7HLX4/bfYd4L6g3m3j5ceLUUFYflUtzghVnROA0How2MGH4iMJwDQc2RrhEOcbeJBbp+qf X-Received: by 2002:a17:906:dac7:b0:94a:56ec:7f12 with SMTP id xi7-20020a170906dac700b0094a56ec7f12mr14403808ejb.30.1686727803712; Wed, 14 Jun 2023 00:30:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686727803; cv=none; d=google.com; s=arc-20160816; b=YeUlEaIxEsLb7Kwqw6BwURKz/u6EdTV8eddwwZSEtMywl0/GJ9f81wIDjrcd/uGx4I S2SLKf75p+5+BKmuwJpSq/uPw4A+oQfV0+1IIPPfkHWQof7lS0vj8NAURtYBicpNTr8Q PQ5WZ3ZldjL30fnJCLDhWDprMbmZQn9AxkPVK+Y7zUmW5QtufYPRY/3fV81btLUoS35x c/JsOx2ySqeoz3yhioSoKvp58tRGmhuwBz4t4Yn3PNz5AI/rZaYyNr2c2jGQkBYAtRnW teKl6OJF3CXPnnZZ3xSL0xTlj/ZdHKEZJ3A7WYynHxKJ7JBVDvXcxAXph4ZdveSf94Vo 4W/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=AecXLcZhx36olTbav0nnRmDeaozD3SIxT6QtLt9LXwA=; b=fw66x799jcWAS5dzQKYeCMY0l84GnYr1D6eD1l/Llks/mRyTqbIkqKebAFvdR3R7R+ lCFEeKdk2VnxLfg8WImoQDW/22hgFwAzuB+dI97+b0CSHWhbYKSY5sYAKG7gGp3hInJx AtpVo3HxD1+ELYrddrukMPhS06XY7ajATtUS5z/0ruALhaBipwhVrLMQls0FrXywJIVw HI+cyPif6/Nx8gl6r6C9Bqcltx6007eEmZqrLVXo7ueOSe1ilW0eUcbtcIQrY44Olvjk tN0H6hZThA/wnYgDlSQUHJ+rqcST2bRS3p6I/7zKOncuVyY818K7g7mRPzlIEyDC16Ha z/dw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=O1gK8Yir; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id k12-20020a17090627cc00b00977d09f6627si7788215ejc.756.2023.06.14.00.30.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 00:30:03 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=O1gK8Yir; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CFF303857346 for ; Wed, 14 Jun 2023 07:29:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CFF303857346 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686727790; bh=AecXLcZhx36olTbav0nnRmDeaozD3SIxT6QtLt9LXwA=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=O1gK8YirNR+010eiNR6YC2auD7lGMB0RpED/3HuY0GNwnQH2685Tikf4pUlB3dmhL 9gXjeDd1EDMCZyf+GvsuBYe/52KA+H4bjkbkS/HAMCwO6jn1YXXR/AXNGQ70GlgIch cuaO5qKdyXeUYGDD/b8WeoCngy5mqQuw2bxfsDBs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id C2E253858C2F for ; Wed, 14 Jun 2023 07:29:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C2E253858C2F X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="361026270" X-IronPort-AV: E=Sophos;i="6.00,241,1681196400"; d="scan'208";a="361026270" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2023 00:29:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="741741005" X-IronPort-AV: E=Sophos;i="6.00,241,1681196400"; d="scan'208";a="741741005" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga008.jf.intel.com with ESMTP; 14 Jun 2023 00:29:02 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 08AB410079BD; Wed, 14 Jun 2023 15:29:02 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, rdapp.gcc@gmail.com, jeffreyalaw@gmail.com, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32 Date: Wed, 14 Jun 2023 15:29:00 +0800 Message-Id: <20230614072900.3698145-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230614005859.960040-1-pan2.li@intel.com> References: <20230614005859.960040-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Pan Li via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: pan2.li@intel.com Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768637741862842239?= X-GMAIL-MSGID: =?utf-8?q?1768662293198527909?= From: Pan Li This patch would like to fix one bug exported by RV32 test case multiple_rgroup_run-2.c. The mask should be restricted by elen in vector, and the condition between the vmv.s.x and the vmv.v.x should take inner_bits_size rather than constants. After this patch, below failures on RV32 will be fixed. FAIL: gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/partial/multiple_rgroup_run-2.c execution test FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/repeat_run-3.c -std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax execution test Signed-off-by: Pan Li gcc/ChangeLog: * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask): Take elen instead of scalar BITS_PER_WORD. (expand_vector_init_merge_repeating_sequence): Use inner_bits_size instead of scaler BITS_PER_WORD. Signed-off-by: Pan Li --- gcc/config/riscv/riscv-v.cc | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index e07d5c2901a..db1a5529419 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -399,10 +399,19 @@ rvv_builder::get_merge_scalar_mask (unsigned int index_in_pattern) const { unsigned HOST_WIDE_INT mask = 0; unsigned HOST_WIDE_INT base_mask = (1ULL << index_in_pattern); + /* We restrict the limit to the elen of RVV. For example: + -march=zve32*, the ELEN is 32. + -march=zve64*, the ELEN is 64. + The related vmv.v.x/vmv.s.x is restricted to ELEN as above, we cannot + take care of case like below when ELEN=32 + vsetvil e64,m1 + vmv.v.x/vmv.s.x + */ + unsigned int elen = TARGET_VECTOR_ELEN_64 ? 64 : 32; - gcc_assert (BITS_PER_WORD % npatterns () == 0); + gcc_assert (elen % npatterns () == 0); - int limit = BITS_PER_WORD / npatterns (); + int limit = elen / npatterns (); for (int i = 0; i < limit; i++) mask |= base_mask << (i * npatterns ()); @@ -1928,7 +1937,7 @@ expand_vector_init_merge_repeating_sequence (rtx target, rtx mask = gen_reg_rtx (mask_mode); rtx dup = gen_reg_rtx (dup_mode); - if (full_nelts <= BITS_PER_WORD) /* vmv.s.x. */ + if (full_nelts <= builder.inner_bits_size ()) /* vmv.s.x. */ { rtx ops[] = {dup, gen_scalar_move_mask (dup_mask_mode), RVV_VUNDEF (dup_mode), merge_mask}; @@ -1938,7 +1947,8 @@ expand_vector_init_merge_repeating_sequence (rtx target, else /* vmv.v.x. */ { rtx ops[] = {dup, force_reg (GET_MODE_INNER (dup_mode), merge_mask)}; - rtx vl = gen_int_mode (CEIL (full_nelts, BITS_PER_WORD), Pmode); + rtx vl = gen_int_mode (CEIL (full_nelts, builder.inner_bits_size ()), + Pmode); emit_nonvlmax_integer_move_insn (code_for_pred_broadcast (dup_mode), ops, vl); }