Message ID | 20230526024324.565038-1-hongtao.liu@intel.com |
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State | Accepted |
Headers |
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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id kf2-20020a17090776c200b0096f57f802cfsi2103496ejc.596.2023.05.25.19.46.51 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 19:46:51 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="Q/PiU46z"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 049C53858C2C for <ouuuleilei@gmail.com>; Fri, 26 May 2023 02:46:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 049C53858C2C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685069210; bh=YszCbCF9VHk4wNyx+ua3cnRXZuYwp02kQOfqrGC5esE=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=Q/PiU46zIz/3YkoFH/Cf5xS+0ouv4T3u6AcpHWYeeikTo8aN74IhHy5NnugcUI57n u2G36FV2DFM35D2ldA0y1vRVLyZyJlrd4HWlta/LeHfg+eJQm8b/gdLLSiYVBers/B 69jGuv6+LPwrjWx79qUKNpFAbHDyx8BxHuh1Mxs4= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id 1CC233858D39 for <gcc-patches@gcc.gnu.org>; Fri, 26 May 2023 02:46:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1CC233858D39 X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="352933533" X-IronPort-AV: E=Sophos;i="6.00,192,1681196400"; d="scan'208";a="352933533" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 May 2023 19:45:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="1035174419" X-IronPort-AV: E=Sophos;i="6.00,192,1681196400"; d="scan'208";a="1035174419" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga005.fm.intel.com with ESMTP; 25 May 2023 19:45:25 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id AF5311005050; Fri, 26 May 2023 10:45:24 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com Subject: [PATCH] Disable avoid_false_dep_for_bmi for atom and icelake(and later) core processors. Date: Fri, 26 May 2023 10:43:24 +0800 Message-Id: <20230526024324.565038-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.39.1.388.g2fc9e9ca3c MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: liuhongt via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: liuhongt <hongtao.liu@intel.com> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766923133659213834?= X-GMAIL-MSGID: =?utf-8?q?1766923133659213834?= |
Series |
Disable avoid_false_dep_for_bmi for atom and icelake(and later) core processors.
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Checks
Context | Check | Description |
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snail/gcc-patch-check | success | Github commit url |
Commit Message
liuhongt
May 26, 2023, 2:43 a.m. UTC
lzcnt/tzcnt has been fixed since skylake, popcnt has been fixed since icelake. At least for icelake and later intel Core processors, the errata tune is not needed. And the tune isn't need for ATOM either. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready to push to trunk. gcc/ChangeLog: * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Remove ATOM and ICELAKER(and later) core processors. --- gcc/config/i386/x86-tune.def | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Comments
On Fri, May 26, 2023 at 4:46 AM liuhongt <hongtao.liu@intel.com> wrote: > > lzcnt/tzcnt has been fixed since skylake, popcnt has been fixed since > icelake. At least for icelake and later intel Core processors, the > errata tune is not needed. And the tune isn't need for ATOM either. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ready to push to trunk. > > > gcc/ChangeLog: > > * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): > Remove ATOM and ICELAKER(and later) core processors. OK. Thanks, Uros. > --- > gcc/config/i386/x86-tune.def | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def > index 9d603cc84e4..e1c72cddf1f 100644 > --- a/gcc/config/i386/x86-tune.def > +++ b/gcc/config/i386/x86-tune.def > @@ -335,7 +335,8 @@ DEF_TUNE (X86_TUNE_USE_BT, "use_bt", > /* X86_TUNE_AVOID_FALSE_DEP_FOR_BMI: Avoid false dependency > for bit-manipulation instructions. */ > DEF_TUNE (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, "avoid_false_dep_for_bmi", > - m_SANDYBRIDGE | m_CORE_AVX2 | m_TREMONT | m_ALDERLAKE | m_CORE_ATOM > + m_SANDYBRIDGE | m_HASWELL | m_SKYLAKE | m_SKYLAKE_AVX512 > + | m_CANNONLAKE | m_CASCADELAKE | m_COOPERLAKE > | m_LUJIAZUI | m_GENERIC) > > /* X86_TUNE_ADJUST_UNROLL: This enables adjusting the unroll factor based > -- > 2.39.1.388.g2fc9e9ca3c >
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 9d603cc84e4..e1c72cddf1f 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -335,7 +335,8 @@ DEF_TUNE (X86_TUNE_USE_BT, "use_bt", /* X86_TUNE_AVOID_FALSE_DEP_FOR_BMI: Avoid false dependency for bit-manipulation instructions. */ DEF_TUNE (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI, "avoid_false_dep_for_bmi", - m_SANDYBRIDGE | m_CORE_AVX2 | m_TREMONT | m_ALDERLAKE | m_CORE_ATOM + m_SANDYBRIDGE | m_HASWELL | m_SKYLAKE | m_SKYLAKE_AVX512 + | m_CANNONLAKE | m_CASCADELAKE | m_COOPERLAKE | m_LUJIAZUI | m_GENERIC) /* X86_TUNE_ADJUST_UNROLL: This enables adjusting the unroll factor based