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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id fj16-20020a1709069c9000b0096f985d5193si333375ejc.0.2023.05.24.19.55.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 May 2023 19:55:39 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=QTJmG2jQ; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B235B385843A for ; Thu, 25 May 2023 02:55:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B235B385843A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684983337; bh=NvYVmZbSczFFF0aiEzsMHBbU6ha6Sd12HyKKLGnxNQ4=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=QTJmG2jQh/pnx8rQcxzLFOs/v1DAyXg0wDR82ZmSm+jxLqiTsrimOeXsSeO3CxHRz S/lTfb8bC5iaasE9dvYgfWQQkKe9/MLQuuRbRTXWKHnWSoOLz60pqyxL7S0kpxfDbn kwzJvwoLIdC+Zvig8edcCOcCT/GWVxAhRJfdsgPs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by sourceware.org (Postfix) with ESMTPS id CFFFD3858D20 for ; Thu, 25 May 2023 02:54:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CFFFD3858D20 X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="343231900" X-IronPort-AV: E=Sophos;i="6.00,190,1681196400"; d="scan'208";a="343231900" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 19:54:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="735409113" X-IronPort-AV: E=Sophos;i="6.00,190,1681196400"; d="scan'208";a="735409113" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga008.jf.intel.com with ESMTP; 24 May 2023 19:54:40 -0700 Received: from shliclel4214.sh.intel.com (shliclel4214.sh.intel.com [10.239.240.214]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 92CE21005188; Thu, 25 May 2023 10:54:39 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH] i386: Fix incorrect intrinsic signature for AVX512 s{lli|rai|rli} Date: Thu, 25 May 2023 10:54:39 +0800 Message-Id: <20230525025439.3362655-1-lin1.hu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Hu, Lin1 via Gcc-patches" From: "Li, Pan2 via Gcc-patches" Reply-To: "Hu, Lin1" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766833089737411027?= X-GMAIL-MSGID: =?utf-8?q?1766833089737411027?= Hi all, This patch aims to fix incorrect intrinsic signature for _mm{512|256|}_s{lli|rai|rli}_epi*. And it has been tested on x86_64-pc-linux-gnu. OK for trunk? BRs, Lin gcc/ChangeLog: PR target/109173 PR target/109174 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from int to const int. (_mm512_mask_srli_epi16): Ditto. (_mm512_slli_epi16): Ditto. (_mm512_mask_slli_epi16): Ditto. (_mm512_maskz_slli_epi16): Ditto. (_mm512_srai_epi16): Ditto. (_mm512_mask_srai_epi16): Ditto. (_mm512_maskz_srai_epi16): Ditto. * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto. (_mm256_maskz_srli_epi32): Ditto. (_mm_mask_srli_epi32): Ditto. (_mm_maskz_srli_epi32): Ditto. (_mm256_mask_srli_epi64): Ditto. (_mm256_maskz_srli_epi64): Ditto. (_mm_mask_srli_epi64): Ditto. (_mm_maskz_srli_epi64): Ditto. (_mm256_mask_srai_epi32): Ditto. (_mm256_maskz_srai_epi32): Ditto. (_mm_mask_srai_epi32): Ditto. (_mm_maskz_srai_epi32): Ditto. (_mm256_srai_epi64): Ditto. (_mm256_mask_srai_epi64): Ditto. (_mm256_maskz_srai_epi64): Ditto. (_mm_srai_epi64): Ditto. (_mm_mask_srai_epi64): Ditto. (_mm_maskz_srai_epi64): Ditto. (_mm_mask_slli_epi32): Ditto. (_mm_maskz_slli_epi32): Ditto. (_mm_mask_slli_epi64): Ditto. (_mm_maskz_slli_epi64): Ditto. (_mm256_mask_slli_epi32): Ditto. (_mm256_maskz_slli_epi32): Ditto. (_mm256_mask_slli_epi64): Ditto. (_mm256_maskz_slli_epi64): Ditto. (_mm_mask_srai_epi16): Ditto. (_mm_maskz_srai_epi16): Ditto. (_mm256_srai_epi16): Ditto. (_mm256_mask_srai_epi16): Ditto. (_mm_mask_slli_epi16): Ditto. (_mm_maskz_slli_epi16): Ditto. (_mm256_mask_slli_epi16): Ditto. (_mm256_maskz_slli_epi16): Ditto. gcc/testsuite/ChangeLog: PR target/109173 PR target/109174 * gcc.target/i386/pr109173-1.c: New test. * gcc.target/i386/pr109174-1.c: Ditto. --- gcc/config/i386/avx512bwintrin.h | 32 +++--- gcc/config/i386/avx512fintrin.h | 58 +++++++---- gcc/config/i386/avx512vlbwintrin.h | 36 ++++--- gcc/config/i386/avx512vlintrin.h | 112 +++++++++++---------- gcc/testsuite/gcc.target/i386/pr109173-1.c | 57 +++++++++++ gcc/testsuite/gcc.target/i386/pr109174-1.c | 45 +++++++++ 6 files changed, 236 insertions(+), 104 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr109173-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr109174-1.c diff --git a/gcc/config/i386/avx512bwintrin.h b/gcc/config/i386/avx512bwintrin.h index 89790f7917b..791d4e35f32 100644 --- a/gcc/config/i386/avx512bwintrin.h +++ b/gcc/config/i386/avx512bwintrin.h @@ -2880,7 +2880,7 @@ _mm512_maskz_dbsad_epu8 (__mmask32 __U, __m512i __A, __m512i __B, extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm512_srli_epi16 (__m512i __A, const int __imm) +_mm512_srli_epi16 (__m512i __A, const unsigned int __imm) { return (__m512i) __builtin_ia32_psrlwi512_mask ((__v32hi) __A, __imm, (__v32hi) @@ -2891,7 +2891,7 @@ _mm512_srli_epi16 (__m512i __A, const int __imm) extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_srli_epi16 (__m512i __W, __mmask32 __U, __m512i __A, - const int __imm) + const unsigned int __imm) { return (__m512i) __builtin_ia32_psrlwi512_mask ((__v32hi) __A, __imm, (__v32hi) __W, @@ -2910,7 +2910,7 @@ _mm512_maskz_srli_epi16 (__mmask32 __U, __m512i __A, const int __imm) extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm512_slli_epi16 (__m512i __A, const int __B) +_mm512_slli_epi16 (__m512i __A, const unsigned int __B) { return (__m512i) __builtin_ia32_psllwi512_mask ((__v32hi) __A, __B, (__v32hi) @@ -2921,7 +2921,7 @@ _mm512_slli_epi16 (__m512i __A, const int __B) extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_slli_epi16 (__m512i __W, __mmask32 __U, __m512i __A, - const int __B) + const unsigned int __B) { return (__m512i) __builtin_ia32_psllwi512_mask ((__v32hi) __A, __B, (__v32hi) __W, @@ -2930,7 +2930,7 @@ _mm512_mask_slli_epi16 (__m512i __W, __mmask32 __U, __m512i __A, extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm512_maskz_slli_epi16 (__mmask32 __U, __m512i __A, const int __B) +_mm512_maskz_slli_epi16 (__mmask32 __U, __m512i __A, const unsigned int __B) { return (__m512i) __builtin_ia32_psllwi512_mask ((__v32hi) __A, __B, (__v32hi) @@ -3008,7 +3008,7 @@ _mm512_maskz_shufflelo_epi16 (__mmask32 __U, __m512i __A, extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm512_srai_epi16 (__m512i __A, const int __imm) +_mm512_srai_epi16 (__m512i __A, const unsigned int __imm) { return (__m512i) __builtin_ia32_psrawi512_mask ((__v32hi) __A, __imm, (__v32hi) @@ -3019,7 +3019,7 @@ _mm512_srai_epi16 (__m512i __A, const int __imm) extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_srai_epi16 (__m512i __W, __mmask32 __U, __m512i __A, - const int __imm) + const unsigned int __imm) { return (__m512i) __builtin_ia32_psrawi512_mask ((__v32hi) __A, __imm, (__v32hi) __W, @@ -3028,7 +3028,7 @@ _mm512_mask_srai_epi16 (__m512i __W, __mmask32 __U, __m512i __A, extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm512_maskz_srai_epi16 (__mmask32 __U, __m512i __A, const int __imm) +_mm512_maskz_srai_epi16 (__mmask32 __U, __m512i __A, const unsigned int __imm) { return (__m512i) __builtin_ia32_psrawi512_mask ((__v32hi) __A, __imm, (__v32hi) @@ -3196,28 +3196,28 @@ _mm512_bsrli_epi128 (__m512i __A, const int __N) #define _mm512_srli_epi16(A, B) \ ((__m512i) __builtin_ia32_psrlwi512_mask ((__v32hi)(__m512i)(A), \ - (int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)-1)) + (unsigned int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)-1)) #define _mm512_mask_srli_epi16(W, U, A, B) \ ((__m512i) __builtin_ia32_psrlwi512_mask ((__v32hi)(__m512i)(A), \ - (int)(B), (__v32hi)(__m512i)(W), (__mmask32)(U))) + (unsigned int)(B), (__v32hi)(__m512i)(W), (__mmask32)(U))) #define _mm512_maskz_srli_epi16(U, A, B) \ ((__m512i) __builtin_ia32_psrlwi512_mask ((__v32hi)(__m512i)(A), \ (int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)(U))) #define _mm512_slli_epi16(X, C) \ - ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (int)(C),\ + ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (unsigned int)(C),\ (__v32hi)(__m512i)_mm512_setzero_si512 (), \ (__mmask32)-1)) #define _mm512_mask_slli_epi16(W, U, X, C) \ - ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (int)(C),\ + ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (unsigned int)(C),\ (__v32hi)(__m512i)(W),\ (__mmask32)(U))) #define _mm512_maskz_slli_epi16(U, X, C) \ - ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (int)(C),\ + ((__m512i)__builtin_ia32_psllwi512_mask ((__v32hi)(__m512i)(X), (unsigned int)(C),\ (__v32hi)(__m512i)_mm512_setzero_si512 (), \ (__mmask32)(U))) @@ -3257,15 +3257,15 @@ _mm512_bsrli_epi128 (__m512i __A, const int __N) #define _mm512_srai_epi16(A, B) \ ((__m512i) __builtin_ia32_psrawi512_mask ((__v32hi)(__m512i)(A), \ - (int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)-1)) + (unsigned int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)-1)) #define _mm512_mask_srai_epi16(W, U, A, B) \ ((__m512i) __builtin_ia32_psrawi512_mask ((__v32hi)(__m512i)(A), \ - (int)(B), (__v32hi)(__m512i)(W), (__mmask32)(U))) + (unsigned int)(B), (__v32hi)(__m512i)(W), (__mmask32)(U))) #define _mm512_maskz_srai_epi16(U, A, B) \ ((__m512i) __builtin_ia32_psrawi512_mask ((__v32hi)(__m512i)(A), \ - (int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)(U))) + (unsigned int)(B), (__v32hi)_mm512_setzero_si512 (), (__mmask32)(U))) #define _mm512_mask_blend_epi16(__U, __A, __W) \ ((__m512i) __builtin_ia32_blendmw_512_mask ((__v32hi) (__A), \ diff --git a/gcc/config/i386/avx512fintrin.h b/gcc/config/i386/avx512fintrin.h index 89b321970cc..277260c3655 100644 --- a/gcc/config/i386/avx512fintrin.h +++ b/gcc/config/i386/avx512fintrin.h @@ -1038,17 +1038,20 @@ _mm512_maskz_slli_epi64 (__mmask8 __U, __m512i __A, unsigned int __B) } #else #define _mm512_slli_epi64(X, C) \ - ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ - (__v8di)(__m512i)_mm512_undefined_epi32 (),\ + ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ + (__v8di)(__m512i)_mm512_undefined_epi32 (), \ (__mmask8)-1)) #define _mm512_mask_slli_epi64(W, U, X, C) \ - ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ - (__v8di)(__m512i)(W),\ + ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ + (__v8di)(__m512i)(W), \ (__mmask8)(U))) #define _mm512_maskz_slli_epi64(U, X, C) \ - ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)_mm512_setzero_si512 (),\ (__mmask8)(U))) #endif @@ -1117,17 +1120,20 @@ _mm512_maskz_srli_epi64 (__mmask8 __U, __m512i __A, unsigned int __B) } #else #define _mm512_srli_epi64(X, C) \ - ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)_mm512_undefined_epi32 (),\ (__mmask8)-1)) #define _mm512_mask_srli_epi64(W, U, X, C) \ - ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)(W),\ (__mmask8)(U))) #define _mm512_maskz_srli_epi64(U, X, C) \ - ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)_mm512_setzero_si512 (),\ (__mmask8)(U))) #endif @@ -1196,17 +1202,20 @@ _mm512_maskz_srai_epi64 (__mmask8 __U, __m512i __A, unsigned int __B) } #else #define _mm512_srai_epi64(X, C) \ - ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)_mm512_undefined_epi32 (),\ (__mmask8)-1)) #define _mm512_mask_srai_epi64(W, U, X, C) \ - ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)(W),\ (__mmask8)(U))) #define _mm512_maskz_srai_epi64(U, X, C) \ - ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), \ + (unsigned int)(C), \ (__v8di)(__m512i)_mm512_setzero_si512 (),\ (__mmask8)(U))) #endif @@ -1275,17 +1284,20 @@ _mm512_maskz_slli_epi32 (__mmask16 __U, __m512i __A, unsigned int __B) } #else #define _mm512_slli_epi32(X, C) \ - ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_undefined_epi32 (),\ (__mmask16)-1)) #define _mm512_mask_slli_epi32(W, U, X, C) \ - ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)(W),\ (__mmask16)(U))) #define _mm512_maskz_slli_epi32(U, X, C) \ - ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_setzero_si512 (),\ (__mmask16)(U))) #endif @@ -1354,17 +1366,20 @@ _mm512_maskz_srli_epi32 (__mmask16 __U, __m512i __A, unsigned int __B) } #else #define _mm512_srli_epi32(X, C) \ - ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_undefined_epi32 (),\ (__mmask16)-1)) #define _mm512_mask_srli_epi32(W, U, X, C) \ - ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)(W),\ (__mmask16)(U))) #define _mm512_maskz_srli_epi32(U, X, C) \ - ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_setzero_si512 (),\ (__mmask16)(U))) #endif @@ -1433,17 +1448,20 @@ _mm512_maskz_srai_epi32 (__mmask16 __U, __m512i __A, unsigned int __B) } #else #define _mm512_srai_epi32(X, C) \ - ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_undefined_epi32 (),\ (__mmask16)-1)) #define _mm512_mask_srai_epi32(W, U, X, C) \ - ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)(W),\ (__mmask16)(U))) #define _mm512_maskz_srai_epi32(U, X, C) \ - ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), (int)(C),\ + ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), \ + (unsigned int)(C), \ (__v16si)(__m512i)_mm512_setzero_si512 (),\ (__mmask16)(U))) #endif diff --git a/gcc/config/i386/avx512vlbwintrin.h b/gcc/config/i386/avx512vlbwintrin.h index 3654cf214c4..b9d248b807b 100644 --- a/gcc/config/i386/avx512vlbwintrin.h +++ b/gcc/config/i386/avx512vlbwintrin.h @@ -1759,7 +1759,7 @@ _mm_maskz_shufflelo_epi16 (__mmask8 __U, __m128i __A, const int __imm) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_srai_epi16 (__m256i __W, __mmask16 __U, __m256i __A, - const int __imm) + const unsigned int __imm) { return (__m256i) __builtin_ia32_psrawi256_mask ((__v16hi) __A, __imm, (__v16hi) __W, @@ -1768,7 +1768,7 @@ _mm256_mask_srai_epi16 (__m256i __W, __mmask16 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_srai_epi16 (__mmask16 __U, __m256i __A, const int __imm) +_mm256_maskz_srai_epi16 (__mmask16 __U, __m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psrawi256_mask ((__v16hi) __A, __imm, (__v16hi) @@ -1779,7 +1779,7 @@ _mm256_maskz_srai_epi16 (__mmask16 __U, __m256i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_srai_epi16 (__m128i __W, __mmask8 __U, __m128i __A, - const int __imm) + const unsigned int __imm) { return (__m128i) __builtin_ia32_psrawi128_mask ((__v8hi) __A, __imm, (__v8hi) __W, @@ -1788,7 +1788,7 @@ _mm_mask_srai_epi16 (__m128i __W, __mmask8 __U, __m128i __A, extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_srai_epi16 (__mmask8 __U, __m128i __A, const int __imm) +_mm_maskz_srai_epi16 (__mmask8 __U, __m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psrawi128_mask ((__v8hi) __A, __imm, (__v8hi) @@ -1799,7 +1799,7 @@ _mm_maskz_srai_epi16 (__mmask8 __U, __m128i __A, const int __imm) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_slli_epi16 (__m256i __W, __mmask16 __U, __m256i __A, - int __B) + unsigned int __B) { return (__m256i) __builtin_ia32_psllwi256_mask ((__v16hi) __A, __B, (__v16hi) __W, @@ -1808,7 +1808,7 @@ _mm256_mask_slli_epi16 (__m256i __W, __mmask16 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_slli_epi16 (__mmask16 __U, __m256i __A, int __B) +_mm256_maskz_slli_epi16 (__mmask16 __U, __m256i __A, unsigned int __B) { return (__m256i) __builtin_ia32_psllwi256_mask ((__v16hi) __A, __B, (__v16hi) @@ -1818,7 +1818,7 @@ _mm256_maskz_slli_epi16 (__mmask16 __U, __m256i __A, int __B) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_mask_slli_epi16 (__m128i __W, __mmask8 __U, __m128i __A, int __B) +_mm_mask_slli_epi16 (__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_psllwi128_mask ((__v8hi) __A, __B, (__v8hi) __W, @@ -1827,7 +1827,7 @@ _mm_mask_slli_epi16 (__m128i __W, __mmask8 __U, __m128i __A, int __B) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) +_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_psllwi128_mask ((__v8hi) __A, __B, (__v8hi) @@ -1859,19 +1859,19 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) #define _mm256_mask_srai_epi16(W, U, A, B) \ ((__m256i) __builtin_ia32_psrawi256_mask ((__v16hi)(__m256i)(A), \ - (int)(B), (__v16hi)(__m256i)(W), (__mmask16)(U))) + (unsigned int)(B), (__v16hi)(__m256i)(W), (__mmask16)(U))) #define _mm256_maskz_srai_epi16(U, A, B) \ ((__m256i) __builtin_ia32_psrawi256_mask ((__v16hi)(__m256i)(A), \ - (int)(B), (__v16hi)_mm256_setzero_si256 (), (__mmask16)(U))) + (unsigned int)(B), (__v16hi)_mm256_setzero_si256 (), (__mmask16)(U))) #define _mm_mask_srai_epi16(W, U, A, B) \ ((__m128i) __builtin_ia32_psrawi128_mask ((__v8hi)(__m128i)(A), \ - (int)(B), (__v8hi)(__m128i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v8hi)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_srai_epi16(U, A, B) \ ((__m128i) __builtin_ia32_psrawi128_mask ((__v8hi)(__m128i)(A), \ - (int)(B), (__v8hi)_mm_setzero_si128(), (__mmask8)(U))) + (unsigned int)(B), (__v8hi)_mm_setzero_si128(), (__mmask8)(U))) #define _mm256_mask_shufflehi_epi16(W, U, A, B) \ ((__m256i) __builtin_ia32_pshufhw256_mask ((__v16hi)(__m256i)(A), (int)(B), \ @@ -1931,12 +1931,14 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) (__mmask16)(U))) #define _mm_mask_slli_epi16(W, U, X, C) \ - ((__m128i)__builtin_ia32_psllwi128_mask ((__v8hi)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_psllwi128_mask ((__v8hi)(__m128i)(X), \ + (unsigned int)(C),\ (__v8hi)(__m128i)(W),\ (__mmask8)(U))) #define _mm_maskz_slli_epi16(U, X, C) \ - ((__m128i)__builtin_ia32_psllwi128_mask ((__v8hi)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_psllwi128_mask ((__v8hi)(__m128i)(X), \ + (unsigned int)(C),\ (__v8hi)(__m128i)_mm_setzero_si128 (),\ (__mmask8)(U))) @@ -1947,12 +1949,14 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, int __B) (__mmask16)-1)) #define _mm256_mask_slli_epi16(W, U, X, C) \ - ((__m256i)__builtin_ia32_psllwi256_mask ((__v16hi)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_psllwi256_mask ((__v16hi)(__m256i)(X), \ + (unsigned int)(C), \ (__v16hi)(__m256i)(W),\ (__mmask16)(U))) #define _mm256_maskz_slli_epi16(U, X, C) \ - ((__m256i)__builtin_ia32_psllwi256_mask ((__v16hi)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_psllwi256_mask ((__v16hi)(__m256i)(X), \ + (unsigned int)(C), \ (__v16hi)(__m256i)_mm256_setzero_si256 (),\ (__mmask16)(U))) diff --git a/gcc/config/i386/avx512vlintrin.h b/gcc/config/i386/avx512vlintrin.h index 4a717a7e52f..8b055867986 100644 --- a/gcc/config/i386/avx512vlintrin.h +++ b/gcc/config/i386/avx512vlintrin.h @@ -10565,7 +10565,7 @@ _mm_maskz_fixupimm_ps (__mmask8 __U, __m128 __A, __m128 __B, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_srli_epi32 (__m256i __W, __mmask8 __U, __m256i __A, - const int __imm) + const unsigned int __imm) { return (__m256i) __builtin_ia32_psrldi256_mask ((__v8si) __A, __imm, (__v8si) __W, @@ -10574,7 +10574,7 @@ _mm256_mask_srli_epi32 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_srli_epi32 (__mmask8 __U, __m256i __A, const int __imm) +_mm256_maskz_srli_epi32 (__mmask8 __U, __m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psrldi256_mask ((__v8si) __A, __imm, (__v8si) @@ -10585,7 +10585,7 @@ _mm256_maskz_srli_epi32 (__mmask8 __U, __m256i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_srli_epi32 (__m128i __W, __mmask8 __U, __m128i __A, - const int __imm) + const unsigned int __imm) { return (__m128i) __builtin_ia32_psrldi128_mask ((__v4si) __A, __imm, (__v4si) __W, @@ -10594,7 +10594,7 @@ _mm_mask_srli_epi32 (__m128i __W, __mmask8 __U, __m128i __A, extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_srli_epi32 (__mmask8 __U, __m128i __A, const int __imm) +_mm_maskz_srli_epi32 (__mmask8 __U, __m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psrldi128_mask ((__v4si) __A, __imm, (__v4si) @@ -10605,7 +10605,7 @@ _mm_maskz_srli_epi32 (__mmask8 __U, __m128i __A, const int __imm) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_srli_epi64 (__m256i __W, __mmask8 __U, __m256i __A, - const int __imm) + const unsigned int __imm) { return (__m256i) __builtin_ia32_psrlqi256_mask ((__v4di) __A, __imm, (__v4di) __W, @@ -10614,7 +10614,7 @@ _mm256_mask_srli_epi64 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_srli_epi64 (__mmask8 __U, __m256i __A, const int __imm) +_mm256_maskz_srli_epi64 (__mmask8 __U, __m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psrlqi256_mask ((__v4di) __A, __imm, (__v4di) @@ -10625,7 +10625,7 @@ _mm256_maskz_srli_epi64 (__mmask8 __U, __m256i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_srli_epi64 (__m128i __W, __mmask8 __U, __m128i __A, - const int __imm) + const unsigned int __imm) { return (__m128i) __builtin_ia32_psrlqi128_mask ((__v2di) __A, __imm, (__v2di) __W, @@ -10634,7 +10634,7 @@ _mm_mask_srli_epi64 (__m128i __W, __mmask8 __U, __m128i __A, extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_srli_epi64 (__mmask8 __U, __m128i __A, const int __imm) +_mm_maskz_srli_epi64 (__mmask8 __U, __m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psrlqi128_mask ((__v2di) __A, __imm, (__v2di) @@ -12059,7 +12059,7 @@ _mm256_maskz_cvtps_ph (__mmask8 __U, __m256 __A, const int __I) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_srai_epi32 (__m256i __W, __mmask8 __U, __m256i __A, - const int __imm) + const unsigned int __imm) { return (__m256i) __builtin_ia32_psradi256_mask ((__v8si) __A, __imm, (__v8si) __W, @@ -12068,7 +12068,7 @@ _mm256_mask_srai_epi32 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_srai_epi32 (__mmask8 __U, __m256i __A, const int __imm) +_mm256_maskz_srai_epi32 (__mmask8 __U, __m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psradi256_mask ((__v8si) __A, __imm, (__v8si) @@ -12079,7 +12079,7 @@ _mm256_maskz_srai_epi32 (__mmask8 __U, __m256i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_srai_epi32 (__m128i __W, __mmask8 __U, __m128i __A, - const int __imm) + const unsigned int __imm) { return (__m128i) __builtin_ia32_psradi128_mask ((__v4si) __A, __imm, (__v4si) __W, @@ -12088,7 +12088,7 @@ _mm_mask_srai_epi32 (__m128i __W, __mmask8 __U, __m128i __A, extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_srai_epi32 (__mmask8 __U, __m128i __A, const int __imm) +_mm_maskz_srai_epi32 (__mmask8 __U, __m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psradi128_mask ((__v4si) __A, __imm, (__v4si) @@ -12098,7 +12098,7 @@ _mm_maskz_srai_epi32 (__mmask8 __U, __m128i __A, const int __imm) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_srai_epi64 (__m256i __A, const int __imm) +_mm256_srai_epi64 (__m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psraqi256_mask ((__v4di) __A, __imm, (__v4di) @@ -12109,7 +12109,7 @@ _mm256_srai_epi64 (__m256i __A, const int __imm) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_srai_epi64 (__m256i __W, __mmask8 __U, __m256i __A, - const int __imm) + const unsigned int __imm) { return (__m256i) __builtin_ia32_psraqi256_mask ((__v4di) __A, __imm, (__v4di) __W, @@ -12118,7 +12118,7 @@ _mm256_mask_srai_epi64 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_srai_epi64 (__mmask8 __U, __m256i __A, const int __imm) +_mm256_maskz_srai_epi64 (__mmask8 __U, __m256i __A, const unsigned int __imm) { return (__m256i) __builtin_ia32_psraqi256_mask ((__v4di) __A, __imm, (__v4di) @@ -12128,7 +12128,7 @@ _mm256_maskz_srai_epi64 (__mmask8 __U, __m256i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_srai_epi64 (__m128i __A, const int __imm) +_mm_srai_epi64 (__m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psraqi128_mask ((__v2di) __A, __imm, (__v2di) @@ -12139,7 +12139,7 @@ _mm_srai_epi64 (__m128i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_srai_epi64 (__m128i __W, __mmask8 __U, __m128i __A, - const int __imm) + const unsigned int __imm) { return (__m128i) __builtin_ia32_psraqi128_mask ((__v2di) __A, __imm, (__v2di) __W, @@ -12148,7 +12148,7 @@ _mm_mask_srai_epi64 (__m128i __W, __mmask8 __U, __m128i __A, extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_srai_epi64 (__mmask8 __U, __m128i __A, const int __imm) +_mm_maskz_srai_epi64 (__mmask8 __U, __m128i __A, const unsigned int __imm) { return (__m128i) __builtin_ia32_psraqi128_mask ((__v2di) __A, __imm, (__v2di) @@ -12158,7 +12158,7 @@ _mm_maskz_srai_epi64 (__mmask8 __U, __m128i __A, const int __imm) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_mask_slli_epi32 (__m128i __W, __mmask8 __U, __m128i __A, int __B) +_mm_mask_slli_epi32 (__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_pslldi128_mask ((__v4si) __A, __B, (__v4si) __W, @@ -12167,7 +12167,7 @@ _mm_mask_slli_epi32 (__m128i __W, __mmask8 __U, __m128i __A, int __B) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_slli_epi32 (__mmask8 __U, __m128i __A, int __B) +_mm_maskz_slli_epi32 (__mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_pslldi128_mask ((__v4si) __A, __B, (__v4si) @@ -12177,7 +12177,7 @@ _mm_maskz_slli_epi32 (__mmask8 __U, __m128i __A, int __B) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_mask_slli_epi64 (__m128i __W, __mmask8 __U, __m128i __A, int __B) +_mm_mask_slli_epi64 (__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_psllqi128_mask ((__v2di) __A, __B, (__v2di) __W, @@ -12186,7 +12186,7 @@ _mm_mask_slli_epi64 (__m128i __W, __mmask8 __U, __m128i __A, int __B) extern __inline __m128i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm_maskz_slli_epi64 (__mmask8 __U, __m128i __A, int __B) +_mm_maskz_slli_epi64 (__mmask8 __U, __m128i __A, unsigned int __B) { return (__m128i) __builtin_ia32_psllqi128_mask ((__v2di) __A, __B, (__v2di) @@ -12197,7 +12197,7 @@ _mm_maskz_slli_epi64 (__mmask8 __U, __m128i __A, int __B) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_slli_epi32 (__m256i __W, __mmask8 __U, __m256i __A, - int __B) + unsigned int __B) { return (__m256i) __builtin_ia32_pslldi256_mask ((__v8si) __A, __B, (__v8si) __W, @@ -12206,7 +12206,7 @@ _mm256_mask_slli_epi32 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_slli_epi32 (__mmask8 __U, __m256i __A, int __B) +_mm256_maskz_slli_epi32 (__mmask8 __U, __m256i __A, unsigned int __B) { return (__m256i) __builtin_ia32_pslldi256_mask ((__v8si) __A, __B, (__v8si) @@ -12217,7 +12217,7 @@ _mm256_maskz_slli_epi32 (__mmask8 __U, __m256i __A, int __B) extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_slli_epi64 (__m256i __W, __mmask8 __U, __m256i __A, - int __B) + unsigned int __B) { return (__m256i) __builtin_ia32_psllqi256_mask ((__v4di) __A, __B, (__v4di) __W, @@ -12226,7 +12226,7 @@ _mm256_mask_slli_epi64 (__m256i __W, __mmask8 __U, __m256i __A, extern __inline __m256i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) -_mm256_maskz_slli_epi64 (__mmask8 __U, __m256i __A, int __B) +_mm256_maskz_slli_epi64 (__mmask8 __U, __m256i __A, unsigned int __B) { return (__m256i) __builtin_ia32_psllqi256_mask ((__v4di) __A, __B, (__v4di) @@ -12864,73 +12864,81 @@ _mm256_permutex_pd (__m256d __X, const int __M) #define _mm256_mask_srli_epi32(W, U, A, B) \ ((__m256i) __builtin_ia32_psrldi256_mask ((__v8si)(__m256i)(A), \ - (int)(B), (__v8si)(__m256i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v8si)(__m256i)(W), (__mmask8)(U))) #define _mm256_maskz_srli_epi32(U, A, B) \ ((__m256i) __builtin_ia32_psrldi256_mask ((__v8si)(__m256i)(A), \ - (int)(B), (__v8si)_mm256_setzero_si256 (), (__mmask8)(U))) + (unsigned int)(B), (__v8si)_mm256_setzero_si256 (), (__mmask8)(U))) #define _mm_mask_srli_epi32(W, U, A, B) \ ((__m128i) __builtin_ia32_psrldi128_mask ((__v4si)(__m128i)(A), \ - (int)(B), (__v4si)(__m128i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v4si)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_srli_epi32(U, A, B) \ ((__m128i) __builtin_ia32_psrldi128_mask ((__v4si)(__m128i)(A), \ - (int)(B), (__v4si)_mm_setzero_si128 (), (__mmask8)(U))) + (unsigned int)(B), (__v4si)_mm_setzero_si128 (), (__mmask8)(U))) #define _mm256_mask_srli_epi64(W, U, A, B) \ ((__m256i) __builtin_ia32_psrlqi256_mask ((__v4di)(__m256i)(A), \ - (int)(B), (__v4di)(__m256i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v4di)(__m256i)(W), (__mmask8)(U))) #define _mm256_maskz_srli_epi64(U, A, B) \ ((__m256i) __builtin_ia32_psrlqi256_mask ((__v4di)(__m256i)(A), \ - (int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)(U))) + (unsigned int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)(U))) #define _mm_mask_srli_epi64(W, U, A, B) \ ((__m128i) __builtin_ia32_psrlqi128_mask ((__v2di)(__m128i)(A), \ - (int)(B), (__v2di)(__m128i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v2di)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_srli_epi64(U, A, B) \ ((__m128i) __builtin_ia32_psrlqi128_mask ((__v2di)(__m128i)(A), \ - (int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)(U))) + (unsigned int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)(U))) #define _mm256_mask_slli_epi32(W, U, X, C) \ - ((__m256i)__builtin_ia32_pslldi256_mask ((__v8si)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_pslldi256_mask ((__v8si)(__m256i)(X), \ + (unsigned int)(C), \ (__v8si)(__m256i)(W), \ (__mmask8)(U))) #define _mm256_maskz_slli_epi32(U, X, C) \ - ((__m256i)__builtin_ia32_pslldi256_mask ((__v8si)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_pslldi256_mask ((__v8si)(__m256i)(X), \ + (unsigned int)(C), \ (__v8si)(__m256i)_mm256_setzero_si256 (), \ (__mmask8)(U))) #define _mm256_mask_slli_epi64(W, U, X, C) \ - ((__m256i)__builtin_ia32_psllqi256_mask ((__v4di)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_psllqi256_mask ((__v4di)(__m256i)(X), \ + (unsigned int)(C), \ (__v4di)(__m256i)(W), \ (__mmask8)(U))) #define _mm256_maskz_slli_epi64(U, X, C) \ - ((__m256i)__builtin_ia32_psllqi256_mask ((__v4di)(__m256i)(X), (int)(C),\ + ((__m256i)__builtin_ia32_psllqi256_mask ((__v4di)(__m256i)(X), \ + (unsigned int)(C), \ (__v4di)(__m256i)_mm256_setzero_si256 (), \ (__mmask8)(U))) #define _mm_mask_slli_epi32(W, U, X, C) \ - ((__m128i)__builtin_ia32_pslldi128_mask ((__v4si)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_pslldi128_mask ((__v4si)(__m128i)(X), \ + (unsigned int)(C), \ (__v4si)(__m128i)(W),\ (__mmask8)(U))) #define _mm_maskz_slli_epi32(U, X, C) \ - ((__m128i)__builtin_ia32_pslldi128_mask ((__v4si)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_pslldi128_mask ((__v4si)(__m128i)(X), \ + (unsigned int)(C), \ (__v4si)(__m128i)_mm_setzero_si128 (),\ (__mmask8)(U))) #define _mm_mask_slli_epi64(W, U, X, C) \ - ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), \ + (unsigned int)(C), \ (__v2di)(__m128i)(W),\ (__mmask8)(U))) #define _mm_maskz_slli_epi64(U, X, C) \ - ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), (int)(C),\ + ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), \ + (unsigned int)(C), \ (__v2di)(__m128i)_mm_setzero_si128 (),\ (__mmask8)(U))) @@ -13634,43 +13642,43 @@ _mm256_permutex_pd (__m256d __X, const int __M) #define _mm256_mask_srai_epi32(W, U, A, B) \ ((__m256i) __builtin_ia32_psradi256_mask ((__v8si)(__m256i)(A), \ - (int)(B), (__v8si)(__m256i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v8si)(__m256i)(W), (__mmask8)(U))) #define _mm256_maskz_srai_epi32(U, A, B) \ ((__m256i) __builtin_ia32_psradi256_mask ((__v8si)(__m256i)(A), \ - (int)(B), (__v8si)_mm256_setzero_si256 (), (__mmask8)(U))) + (unsigned int)(B), (__v8si)_mm256_setzero_si256 (), (__mmask8)(U))) #define _mm_mask_srai_epi32(W, U, A, B) \ ((__m128i) __builtin_ia32_psradi128_mask ((__v4si)(__m128i)(A), \ - (int)(B), (__v4si)(__m128i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v4si)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_srai_epi32(U, A, B) \ ((__m128i) __builtin_ia32_psradi128_mask ((__v4si)(__m128i)(A), \ - (int)(B), (__v4si)_mm_setzero_si128 (), (__mmask8)(U))) + (unsigned int)(B), (__v4si)_mm_setzero_si128 (), (__mmask8)(U))) #define _mm256_srai_epi64(A, B) \ ((__m256i) __builtin_ia32_psraqi256_mask ((__v4di)(__m256i)(A), \ - (int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)-1)) + (unsigned int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)-1)) #define _mm256_mask_srai_epi64(W, U, A, B) \ ((__m256i) __builtin_ia32_psraqi256_mask ((__v4di)(__m256i)(A), \ - (int)(B), (__v4di)(__m256i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v4di)(__m256i)(W), (__mmask8)(U))) #define _mm256_maskz_srai_epi64(U, A, B) \ ((__m256i) __builtin_ia32_psraqi256_mask ((__v4di)(__m256i)(A), \ - (int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)(U))) + (unsigned int)(B), (__v4di)_mm256_setzero_si256 (), (__mmask8)(U))) #define _mm_srai_epi64(A, B) \ ((__m128i) __builtin_ia32_psraqi128_mask ((__v2di)(__m128i)(A), \ - (int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)-1)) + (unsigned int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)-1)) #define _mm_mask_srai_epi64(W, U, A, B) \ ((__m128i) __builtin_ia32_psraqi128_mask ((__v2di)(__m128i)(A), \ - (int)(B), (__v2di)(__m128i)(W), (__mmask8)(U))) + (unsigned int)(B), (__v2di)(__m128i)(W), (__mmask8)(U))) #define _mm_maskz_srai_epi64(U, A, B) \ ((__m128i) __builtin_ia32_psraqi128_mask ((__v2di)(__m128i)(A), \ - (int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)(U))) + (unsigned int)(B), (__v2di)_mm_setzero_si128 (), (__mmask8)(U))) #define _mm256_mask_permutex_pd(W, U, A, B) \ ((__m256d) __builtin_ia32_permdf256_mask ((__v4df)(__m256d)(A), \ diff --git a/gcc/testsuite/gcc.target/i386/pr109173-1.c b/gcc/testsuite/gcc.target/i386/pr109173-1.c new file mode 100644 index 00000000000..286939e56be --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr109173-1.c @@ -0,0 +1,57 @@ +/* PR target/109173 */ +/* { dg-do compile } */ +/* { dg-options "-c -Wsign-conversion -Werror -mavx512bw -mavx512vl -O2" } */ + +#include + +extern unsigned int bar(); + +void foo() +{ + __m128i a1, w1; + __m256i a2, w2; + __mmask8 u; + + _mm256_mask_srli_epi32(w2, u, a2, bar()); + _mm256_maskz_srli_epi32(u, a2, bar()); + _mm_mask_srli_epi32(w1, u, a1, bar()); + _mm_maskz_srli_epi32(u, a1, bar()); + + _mm256_mask_srli_epi64(w2, u, a2, bar()); + _mm256_maskz_srli_epi64(u, a2, bar()); + _mm_mask_srli_epi64(w1, u, a1, bar()); + _mm_maskz_srli_epi64(u, a1, bar()); + + _mm256_mask_srai_epi32(w2, u, a2, bar()); + _mm256_maskz_srai_epi32(u, a2, bar()); + _mm_mask_srai_epi32(w1, u, a1, bar()); + _mm_maskz_srai_epi32(u, a1, bar()); + + _mm256_srai_epi64(a2, bar()); + _mm256_mask_srai_epi64(w2, u, a2, bar()); + _mm256_maskz_srai_epi64(u, a2, bar()); + _mm_srai_epi64(a1, bar()); + _mm_mask_srai_epi64(w1, u, a1, bar()); + _mm_maskz_srai_epi64(u, a1, bar()); + + _mm256_mask_slli_epi32(w2, u, a2, bar()); + _mm256_maskz_slli_epi32(u, a2, bar()); + _mm_mask_slli_epi32(w1, u, a1, bar()); + _mm_maskz_slli_epi32(u, a1, bar()); + + _mm256_mask_slli_epi64(w2, u, a2, bar()); + _mm256_maskz_slli_epi64(u, a2, bar()); + _mm_mask_slli_epi64(w1, u, a1, bar()); + _mm_maskz_slli_epi64(u, a1, bar()); + + _mm256_mask_srai_epi16(w2, u, a2, bar()); + _mm256_maskz_srai_epi16(u, a2, bar()); + _mm_mask_srai_epi16(w1, u, a1, bar()); + _mm_maskz_srai_epi16(u, a1, bar()); + + _mm256_mask_slli_epi16(w2, u, a2, bar()); + _mm256_maskz_slli_epi16(u, a2, bar()); + _mm_mask_slli_epi16(w1, u, a1, bar()); + _mm_maskz_slli_epi16(u, a1, bar()); +} + diff --git a/gcc/testsuite/gcc.target/i386/pr109174-1.c b/gcc/testsuite/gcc.target/i386/pr109174-1.c new file mode 100644 index 00000000000..119721bccf0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr109174-1.c @@ -0,0 +1,45 @@ +/* PR target/109174 */ +/* { dg-do compile } */ +/* { dg-options "-c -Wsign-conversion -Werror -mavx512bw -O2" } */ + +#include + +extern unsigned int bar(); + +void foo() +{ + __m512i a, w; + __mmask32 u1; + __mmask16 u2; + __mmask8 u3; + + _mm512_slli_epi64(a, bar()); + _mm512_mask_slli_epi64(w, u3, a, bar()); + _mm512_maskz_slli_epi64(u3, a, bar()); + _mm512_slli_epi32(a, bar()); + _mm512_mask_slli_epi32(w, u2, a, bar()); + _mm512_maskz_slli_epi32(u2, a, bar()); + _mm512_slli_epi16(a, bar()); + _mm512_mask_slli_epi16(w, u1, a, bar()); + _mm512_maskz_slli_epi16(u1, a, bar()); + + _mm512_srai_epi64(a, bar()); + _mm512_mask_srai_epi64(w, u3, a, bar()); + _mm512_maskz_srai_epi64(u3, a, bar()); + _mm512_srai_epi32(a, bar()); + _mm512_mask_srai_epi32(w, u2, a, bar()); + _mm512_maskz_srai_epi32(u2, a, bar()); + _mm512_srai_epi16(a, bar()); + _mm512_mask_srai_epi16(w, u1, a, bar()); + _mm512_maskz_srai_epi16(u1, a, bar()); + + _mm512_srli_epi64(a, bar()); + _mm512_mask_srli_epi64(w, u3, a, bar()); + _mm512_maskz_srli_epi64(u3, a, bar()); + _mm512_srli_epi32(a, bar()); + _mm512_mask_srli_epi32(w, u2, a, bar()); + _mm512_maskz_srli_epi32(u2, a, bar()); + _mm512_srli_epi16(a, bar()); + _mm512_mask_srli_epi16(w, u1, a, bar()); +} +