diff mbox series

[PATCHv2,2/2] Improve do_store_flag for comparing single bit against that bit

Message ID 20230520150406.1932767-2-apinski@marvell.com
State Unresolved
Headers
Series [PATCHv2,1/2] Improve do_store_flag for single bit comparison against 0 |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Andrew Pinski May 20, 2023, 3:04 p.m. UTC 
  This is a case which I noticed while working on the previous patch.
Sometimes we end up with `a == CST` instead of comparing against 0.
This happens in the following code:
```
unsigned f(unsigned t)
{
  if (t & ~(1<<30)) __builtin_unreachable();
  t ^= (1<<30);
  return t != 0;
}
```

We should handle the case where the nonzero bits is the same as the
comparison operand.

Changes from v1:
* v2: Updated for the bit extraction changes.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

	* expr.cc (do_store_flag): Improve for single bit testing
	not against zero but against that single bit.
---
 gcc/expr.cc | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

Comments

Jeff Law June 4, 2023, 4:55 p.m. UTC | #1 
On 5/20/23 09:04, Andrew Pinski via Gcc-patches wrote:
> This is a case which I noticed while working on the previous patch.
> Sometimes we end up with `a == CST` instead of comparing against 0.
> This happens in the following code:
> ```
> unsigned f(unsigned t)
> {
>    if (t & ~(1<<30)) __builtin_unreachable();
>    t ^= (1<<30);
>    return t != 0;
> }
> ```
> 
> We should handle the case where the nonzero bits is the same as the
> comparison operand.
> 
> Changes from v1:
> * v2: Updated for the bit extraction changes.
> 
> OK? Bootstrapped and tested on x86_64-linux-gnu.
> 
> gcc/ChangeLog:
> 
> 	* expr.cc (do_store_flag): Improve for single bit testing
> 	not against zero but against that single bit.
OK
jeff
diff mbox series

Patch

diff --git a/gcc/expr.cc b/gcc/expr.cc
index b85e963b57e..e7e6112ff81 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -13152,12 +13152,15 @@  do_store_flag (sepops ops, rtx target, machine_mode mode)
      than an scc insn even if we have it.  */
 
   if ((code == NE || code == EQ)
-      && integer_zerop (arg1)
+      && (integer_zerop (arg1)
+	  || integer_pow2p (arg1))
       && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
     {
       wide_int nz = tree_nonzero_bits (arg0);
 
-      if (wi::popcount (nz) == 1)
+      if (wi::popcount (nz) == 1
+	  && (integer_zerop (arg1)
+	      || wi::to_wide (arg1) == nz))
 	{
 	  tree op0;
 	  int bitnum;
@@ -13175,7 +13178,9 @@  do_store_flag (sepops ops, rtx target, machine_mode mode)
 	      op0 = arg0;
 	      bitnum = wi::exact_log2 (nz);
 	    }
-	  enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
+	  enum tree_code tcode = EQ_EXPR;
+	  if ((code == NE) ^ !integer_zerop (arg1))
+	    tcode = NE_EXPR;
 
 	  type = lang_hooks.types.type_for_mode (mode, unsignedp);
 	  return expand_single_bit_test (loc, tcode,