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Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT056.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB8698 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Stam Markianos-Wright via Gcc-patches From: Stamatis Markianos-Wright Reply-To: Stam Markianos-Wright Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766229564599402318?= X-GMAIL-MSGID: =?utf-8?q?1766229564599402318?= Hi all, This is a simple testsuite tidy-up patch, addressing to types of errors: * The vcmp vector-scalar tests failing due to the compiler's preference of vector-vector comparisons, over vector-scalar comparisons. This is due to the lack of cost model for MVE and the compiler not knowing that the RTL vec_duplicate is free in those instructions. For now, we simply XFAIL these checks. * The tests for pr108177 had strict usage of q0 and r0 registers, meaning that they would FAIL with -mfloat-abi=softf. The register checks have now been relaxed. A couple of these run-tests also had incosistent use of integer MVE with floating point vectors, so I've now changed these to use FP MVE. gcc/testsuite/ChangeLog: PR target/109697 * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c: XFAIL check. * gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c: XFAIL check. * gcc.target/arm/mve/pr108177-1.c: Relax registers. * gcc.target/arm/mve/pr108177-10.c: Relax registers. * gcc.target/arm/mve/pr108177-11.c: Relax registers. * gcc.target/arm/mve/pr108177-12.c: Relax registers. * gcc.target/arm/mve/pr108177-13.c: Relax registers. * gcc.target/arm/mve/pr108177-13-run.c: use mve_fp * gcc.target/arm/mve/pr108177-14.c: Relax registers. * gcc.target/arm/mve/pr108177-14-run.c: use mve_fp * gcc.target/arm/mve/pr108177-2.c: Relax registers. * gcc.target/arm/mve/pr108177-3.c: Relax registers. * gcc.target/arm/mve/pr108177-4.c: Relax registers. * gcc.target/arm/mve/pr108177-5.c: Relax registers. * gcc.target/arm/mve/pr108177-6.c: Relax registers. * gcc.target/arm/mve/pr108177-7.c: Relax registers. * gcc.target/arm/mve/pr108177-8.c: Relax registers. * gcc.target/arm/mve/pr108177-9.c: Relax registers. --- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 2 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-1.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-10.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-11.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-12.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-13.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-14.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-2.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-3.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-4.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-5.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-6.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-7.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-8.c | 4 ++-- gcc/testsuite/gcc.target/arm/mve/pr108177-9.c | 4 ++-- 40 files changed, 54 insertions(+), 54 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c index dc63c527743..9f8111438a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c @@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u16 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c index 8c5d185ca22..799d3bcdab1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c @@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u32 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c index 2296f3e1655..16c3617c104 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c @@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u8 cs, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c index 1d870428c55..2f84d751c53 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c index 8b8610b0617..6cfe7338fce 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c index 409c9de58ba..362e830c908 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c @@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c index c3b1736bfa1..583beb97849 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c @@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c index 3728c738b54..db7f1877d73 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c @@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i8 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c index 4e9a346ab14..978bd7d4b52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c index 2cf1d1ab0b6..66b6d8b0056 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c index 89d8e2b9109..9c5f1f2f5c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c index 482ac094cf3..2723aa7f98f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c index 085b8277736..5712db2ceef 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c @@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u16 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c index a62a73ff24c..f7a25af8574 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c @@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u32 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c index f05c9d24643..8cd28fb1681 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c @@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.u8 hi, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c index 4f6276484ba..1d1f4bf0e58 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c index e71dcb8f174..bf77a808064 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c index c6fdb08d8ae..f9f091cd9b3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c index 4f1ac3c0977..d22ea1aca30 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c index e36d8a95a85..83beca964d6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c @@ -39,7 +39,7 @@ foo1 (float16x8_t a, float16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c index 7262503eee6..abe1abfed2a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c @@ -39,7 +39,7 @@ foo1 (float32x4_t a, float32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c index 71d878dff9f..ca55fe2f76c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c @@ -39,7 +39,7 @@ foo1 (uint16x8_t a, uint16_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c index 3f997e8e487..77bac757d68 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c @@ -39,7 +39,7 @@ foo1 (uint32x4_t a, uint32_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c index 9917a95ffb7..352afa798d1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c @@ -39,7 +39,7 @@ foo1 (uint8x16_t a, uint8_t b) } /* -**foo2: +**foo2: { xfail *-*-* } ** ... ** vcmp.i8 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) ** ... diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c index 2d42062bc8e..8383b4d9e3a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-1.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.8 q0, \[r0\] +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.8 q0, \[r0\] +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c index 4db594f588f..7b1cd3711d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-10.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrht.32 q0, \[r0\] +** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrht.32 q0, \[r0\] +** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c index 329fcb33eeb..e6ae8524052 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-11.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c index 3f7c5b2a4c1..e352508e07e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-12.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c index 2e731ee3824..34a5e7d35e7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_mve_hw } */ /* { dg-options "-O2" } */ -/* { dg-add-options arm_v8_1m_mve } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ #include "pr108177-13.c" diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c index 2f82228d8f6..13afa92771d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-13.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c index 3cebcf5bbcd..a2dc3338dd3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_mve_hw } */ /* { dg-options "-O2" } */ -/* { dg-add-options arm_v8_1m_mve } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ #include "pr108177-14.c" diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c index ba6196b7994..a093cd4b708 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-14.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrwt.32 q0, \[r0\] +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c index 52c8d87ccc8..da4181ff0b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-2.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.8 q0, \[r0\] +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.8 q0, \[r0\] +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c index ac89e7ea883..9604fd100e6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-3.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.16 q0, \[r0\] +** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.16 q0, \[r0\] +** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c index dc4f7ddab07..07ba37b466c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-4.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.16 q0, \[r0\] +** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.16 q0, \[r0\] +** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c index d1dfd328d66..72c1dd5a4d6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-5.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.32 q0, \[r0\] +** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.32 q0, \[r0\] +** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c index fa70dde9eeb..3fedc9b98c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-6.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrbt.32 q0, \[r0\] +** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrbt.32 q0, \[r0\] +** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c index 73cd8605171..c3b440c3b6c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-7.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c index 187c2b3f4ce..5c450b81d1c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-8.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrht.16 q0, \[r0\] +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */ diff --git a/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c b/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c index caecd18a881..b5084efcc00 100644 --- a/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c +++ b/gcc/testsuite/gcc.target/arm/mve/pr108177-9.c @@ -7,9 +7,9 @@ /* ** test: **... -** vstrht.32 q0, \[r0\] +** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... -** vstrht.32 q0, \[r0\] +** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\] **... */