[v2] Machine_Mode: Extend machine_mode from 8 to 16 bits

Message ID 20230512153839.1106908-1-pan2.li@intel.com
State Accepted
Headers
Series [v2] Machine_Mode: Extend machine_mode from 8 to 16 bits |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Li, Pan2 via Gcc-patches May 12, 2023, 3:38 p.m. UTC
  From: Pan Li <pan2.li@intel.com>

We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
we would like to extend the machine_mode bit size from 8 to 16 bits.
However, it is sensitive to extend the memory size in common structure
like tree or rtx. This patch would like to extend the machine_mode bits
to 16 bits by shrinking, like:

* Swap the bit size of code and machine code in rtx_def.
* Reconcile the machine_mode location and spare in tree.

The memory impact of this patch for correlated structure looks like below:

+-------------------+----------+---------+------+
| struct/bytes      | upstream | patched | diff |
+-------------------+----------+---------+------+
| rtx_obj_reference |        8 |      12 |   +4 |
| ext_modified      |        2 |       4 |   +2 |
| ira_allocno       |      192 |     184 |   -8 |
| qty_table_elem    |       40 |      40 |    0 |
| reg_stat_type     |       64 |      64 |    0 |
| rtx_def           |       40 |      40 |    0 |
| table_elt         |       80 |      80 |    0 |
| tree_decl_common  |      112 |     112 |    0 |
| tree_type_common  |      128 |     128 |    0 |
+-------------------+----------+---------+------+

The tree and rtx related struct has no memory changes after this patch,
and the machine_mode changes to 16 bits already.

Signed-off-by: Pan Li <pan2.li@intel.com>
Co-authored-by: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
Co-Authored-By: Richard Biener <rguenther@suse.de>
Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>

gcc/ChangeLog:

	* combine.cc (struct reg_stat_type): Extended machine_mode to 16 bits.
	* cse.cc (struct qty_table_elem): Extended machine_mode to 16 bits
	and re-ordered the struct fields for alignment.
	(struct table_elt): Extended machine_mode to 16 bits.
	(struct set): Ditto.
	* genopinit.cc (main): Reconciled the machine_mode limit.
	* ira-int.h (struct ira_allocno): Extended machine_mode to 16 bits.
	re-ordered the struct fields for padding.
	* machmode.h (MACHINE_MODE_BITSIZE): New macro.
	* ree.cc (struct ext_modified): Extended machine_mode to 16 bits and
	removed the ATTRIBUTE_PACKED.
	* rtl-ssa/accesses.h: Extended machine_mode to 16 bits.
	* rtl.h (RTX_CODE_BITSIZE): New macro.
	(struct rtx_def): Swap both the bit size and location between the
	rtx_code and the machine_mode.
	(subreg_shape::unique_id): Reconciled the machine_mode limit.
	* rtlanal.h: Extended machine_mode to 16 bits.
	* tree-core.h (struct tree_type_common): Extended machine_mode to 16
	bits and re-ordered the struct fields for padding.
	(struct tree_decl_common): Extended machine_mode to 16 bits.
---
 gcc/combine.cc         |  4 +--
 gcc/cse.cc             | 16 ++++--------
 gcc/genopinit.cc       |  3 ++-
 gcc/ira-int.h          | 56 +++++++++++++++++++++---------------------
 gcc/machmode.h         |  2 ++
 gcc/ree.cc             |  4 +--
 gcc/rtl-ssa/accesses.h |  2 +-
 gcc/rtl.h              | 12 +++++----
 gcc/rtlanal.h          |  2 +-
 gcc/tree-core.h        |  9 ++++---
 10 files changed, 55 insertions(+), 55 deletions(-)
  

Patch

diff --git a/gcc/combine.cc b/gcc/combine.cc
index 5aa0ec5c45a..a23caeed96f 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -200,7 +200,7 @@  struct reg_stat_type {
 
   unsigned HOST_WIDE_INT	last_set_nonzero_bits;
   char				last_set_sign_bit_copies;
-  ENUM_BITFIELD(machine_mode)	last_set_mode : 8;
+  ENUM_BITFIELD(machine_mode)	last_set_mode : MACHINE_MODE_BITSIZE;
 
   /* Set nonzero if references to register n in expressions should not be
      used.  last_set_invalid is set nonzero when this register is being
@@ -235,7 +235,7 @@  struct reg_stat_type {
      truncation if we know that value already contains a truncated
      value.  */
 
-  ENUM_BITFIELD(machine_mode)	truncated_to_mode : 8;
+  ENUM_BITFIELD(machine_mode)	truncated_to_mode : MACHINE_MODE_BITSIZE;
 };
 
 
diff --git a/gcc/cse.cc b/gcc/cse.cc
index b10c9b0c94d..86403b95938 100644
--- a/gcc/cse.cc
+++ b/gcc/cse.cc
@@ -248,10 +248,8 @@  struct qty_table_elem
   rtx comparison_const;
   int comparison_qty;
   unsigned int first_reg, last_reg;
-  /* The sizes of these fields should match the sizes of the
-     code and mode fields of struct rtx_def (see rtl.h).  */
-  ENUM_BITFIELD(rtx_code) comparison_code : 16;
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+  ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE;
 };
 
 /* The table of all qtys, indexed by qty number.  */
@@ -404,9 +402,7 @@  struct table_elt
   struct table_elt *related_value;
   int cost;
   int regcost;
-  /* The size of this field should match the size
-     of the mode field of struct rtx_def (see rtl.h).  */
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
   char in_memory;
   char is_const;
   char flag;
@@ -4152,10 +4148,8 @@  struct set
   /* Nonzero if the SET_SRC contains something
      whose value cannot be predicted and understood.  */
   char src_volatile;
-  /* Original machine mode, in case it becomes a CONST_INT.
-     The size of this field should match the size of the mode
-     field of struct rtx_def (see rtl.h).  */
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  /* Original machine mode, in case it becomes a CONST_INT.  */
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
   /* Hash value of constant equivalent for SET_SRC.  */
   unsigned src_const_hash;
   /* A constant equivalent for SET_SRC, if any.  */
diff --git a/gcc/genopinit.cc b/gcc/genopinit.cc
index 83cb7504fa1..0c1b6859ca0 100644
--- a/gcc/genopinit.cc
+++ b/gcc/genopinit.cc
@@ -182,7 +182,8 @@  main (int argc, const char **argv)
 
   progname = "genopinit";
 
-  if (NUM_OPTABS > 0xffff || MAX_MACHINE_MODE >= 0xff)
+  if (NUM_OPTABS > 0xffff
+    || MAX_MACHINE_MODE >= ((1 << MACHINE_MODE_BITSIZE) - 1))
     fatal ("genopinit range assumptions invalid");
 
   if (!init_rtx_reader_args_cb (argc, argv, handle_arg))
diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index e2de47213b4..e7460cfd906 100644
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -281,13 +281,20 @@  struct ira_allocno
   int regno;
   /* Mode of the allocno which is the mode of the corresponding
      pseudo-register.  */
-  ENUM_BITFIELD (machine_mode) mode : 8;
+  ENUM_BITFIELD (machine_mode) mode : MACHINE_MODE_BITSIZE;
   /* Widest mode of the allocno which in at least one case could be
      for paradoxical subregs where wmode > mode.  */
-  ENUM_BITFIELD (machine_mode) wmode : 8;
+  ENUM_BITFIELD (machine_mode) wmode : MACHINE_MODE_BITSIZE;
   /* Register class which should be used for allocation for given
      allocno.  NO_REGS means that we should use memory.  */
   ENUM_BITFIELD (reg_class) aclass : 16;
+  /* Hard register assigned to given allocno.  Negative value means
+     that memory was allocated to the allocno.  During the reload,
+     spilled allocno has value equal to the corresponding stack slot
+     number (0, ...) - 2.  Value -1 is used for allocnos spilled by the
+     reload (at this point pseudo-register has only one allocno) which
+     did not get stack slot yet.  */
+  signed int hard_regno : 16;
   /* A bitmask of the ABIs used by calls that occur while the allocno
      is live.  */
   unsigned int crossed_calls_abis : NUM_ABI_IDS;
@@ -321,22 +328,6 @@  struct ira_allocno
 
      This is only ever true for non-cap allocnos.  */
   unsigned int might_conflict_with_parent_p : 1;
-  /* Hard register assigned to given allocno.  Negative value means
-     that memory was allocated to the allocno.  During the reload,
-     spilled allocno has value equal to the corresponding stack slot
-     number (0, ...) - 2.  Value -1 is used for allocnos spilled by the
-     reload (at this point pseudo-register has only one allocno) which
-     did not get stack slot yet.  */
-  signed int hard_regno : 16;
-  /* Allocnos with the same regno are linked by the following member.
-     Allocnos corresponding to inner loops are first in the list (it
-     corresponds to depth-first traverse of the loops).  */
-  ira_allocno_t next_regno_allocno;
-  /* There may be different allocnos with the same regno in different
-     regions.  Allocnos are bound to the corresponding loop tree node.
-     Pseudo-register may have only one regular allocno with given loop
-     tree node but more than one cap (see comments above).  */
-  ira_loop_tree_node_t loop_tree_node;
   /* Accumulated usage references of the allocno.  Here and below,
      word 'accumulated' means info for given region and all nested
      subregions.  In this case, 'accumulated' means sum of references
@@ -362,6 +353,25 @@  struct ira_allocno
      register class living at the point than number of hard-registers
      of the class available for the allocation.  */
   int excess_pressure_points_num;
+  /* The number of objects tracked in the following array.  */
+  int num_objects;
+  /* Accumulated frequency of calls which given allocno
+     intersects.  */
+  int call_freq;
+  /* Accumulated number of the intersected calls.  */
+  int calls_crossed_num;
+  /* The number of calls across which it is live, but which should not
+     affect register preferences.  */
+  int cheap_calls_crossed_num;
+  /* Allocnos with the same regno are linked by the following member.
+     Allocnos corresponding to inner loops are first in the list (it
+     corresponds to depth-first traverse of the loops).  */
+  ira_allocno_t next_regno_allocno;
+  /* There may be different allocnos with the same regno in different
+     regions.  Allocnos are bound to the corresponding loop tree node.
+     Pseudo-register may have only one regular allocno with given loop
+     tree node but more than one cap (see comments above).  */
+  ira_loop_tree_node_t loop_tree_node;
   /* Allocno hard reg preferences.  */
   ira_pref_t allocno_prefs;
   /* Copies to other non-conflicting allocnos.  The copies can
@@ -374,21 +384,11 @@  struct ira_allocno
   /* It is a link to allocno (cap) on lower loop level represented by
      given cap.  Null if given allocno is not a cap.  */
   ira_allocno_t cap_member;
-  /* The number of objects tracked in the following array.  */
-  int num_objects;
   /* An array of structures describing conflict information and live
      ranges for each object associated with the allocno.  There may be
      more than one such object in cases where the allocno represents a
      multi-word register.  */
   ira_object_t objects[2];
-  /* Accumulated frequency of calls which given allocno
-     intersects.  */
-  int call_freq;
-  /* Accumulated number of the intersected calls.  */
-  int calls_crossed_num;
-  /* The number of calls across which it is live, but which should not
-     affect register preferences.  */
-  int cheap_calls_crossed_num;
   /* Registers clobbered by intersected calls.  */
    HARD_REG_SET crossed_calls_clobbered_regs;
   /* Array of usage costs (accumulated and the one updated during
diff --git a/gcc/machmode.h b/gcc/machmode.h
index f1865c1ef42..965e40f2799 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -242,6 +242,8 @@  extern const unsigned char mode_class[NUM_MACHINE_MODES];
    || CLASS == MODE_ACCUM                      \
    || CLASS == MODE_UACCUM)
 
+#define MACHINE_MODE_BITSIZE 16
+
 /* An optional T (i.e. a T or nothing), where T is some form of mode class.  */
 template<typename T>
 class opt_mode
diff --git a/gcc/ree.cc b/gcc/ree.cc
index 413aec7c8eb..fc04249fa84 100644
--- a/gcc/ree.cc
+++ b/gcc/ree.cc
@@ -564,10 +564,10 @@  enum ext_modified_kind
   EXT_MODIFIED_SEXT
 };
 
-struct ATTRIBUTE_PACKED ext_modified
+struct ext_modified
 {
   /* Mode from which ree has zero or sign extended the destination.  */
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
 
   /* Kind of modification of the insn.  */
   ENUM_BITFIELD(ext_modified_kind) kind : 2;
diff --git a/gcc/rtl-ssa/accesses.h b/gcc/rtl-ssa/accesses.h
index c5180b9308a..38b4d6160c2 100644
--- a/gcc/rtl-ssa/accesses.h
+++ b/gcc/rtl-ssa/accesses.h
@@ -254,7 +254,7 @@  private:
   unsigned int m_spare : 2;
 
   // The value returned by the accessor above.
-  machine_mode m_mode : 8;
+  machine_mode m_mode : MACHINE_MODE_BITSIZE;
 };
 
 // A contiguous array of access_info pointers.  Used to represent a
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f634cab730b..364782b6060 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -63,6 +63,8 @@  enum rtx_code  {
 # define NON_GENERATOR_NUM_RTX_CODE ((int) MATCH_OPERAND)
 #endif
 
+#define RTX_CODE_BITSIZE 8
+
 /* Register Transfer Language EXPRESSIONS CODE CLASSES */
 
 enum rtx_class  {
@@ -309,11 +311,11 @@  struct GTY((variable_size)) const_poly_int_def {
 struct GTY((desc("0"), tag("0"),
 	    chain_next ("RTX_NEXT (&%h)"),
 	    chain_prev ("RTX_PREV (&%h)"))) rtx_def {
-  /* The kind of expression this is.  */
-  ENUM_BITFIELD(rtx_code) code: 16;
-
   /* The kind of value the expression has.  */
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+
+  /* The kind of expression this is.  */
+  ENUM_BITFIELD(rtx_code) code: RTX_CODE_BITSIZE;
 
   /* 1 in a MEM if we should keep the alias set for this mem unchanged
      when we access a component.
@@ -2164,7 +2166,7 @@  subreg_shape::operator != (const subreg_shape &other) const
 inline unsigned HOST_WIDE_INT
 subreg_shape::unique_id () const
 {
-  { STATIC_ASSERT (MAX_MACHINE_MODE <= 256); }
+  { STATIC_ASSERT (MAX_MACHINE_MODE <= (1 << MACHINE_MODE_BITSIZE)); }
   { STATIC_ASSERT (NUM_POLY_INT_COEFFS <= 3); }
   { STATIC_ASSERT (sizeof (offset.coeffs[0]) <= 2); }
   int res = (int) inner_mode + ((int) outer_mode << 8);
diff --git a/gcc/rtlanal.h b/gcc/rtlanal.h
index 5fbed816e20..9013e75c04b 100644
--- a/gcc/rtlanal.h
+++ b/gcc/rtlanal.h
@@ -100,7 +100,7 @@  public:
 
   /* The mode of the reference.  If IS_MULTIREG, this is the mode of
      REGNO - MULTIREG_OFFSET.  */
-  machine_mode mode : 8;
+  machine_mode mode : MACHINE_MODE_BITSIZE;
 
   /* If IS_MULTIREG, the offset of REGNO from the start of the register.  */
   unsigned int multireg_offset : 8;
diff --git a/gcc/tree-core.h b/gcc/tree-core.h
index a1aea136e75..9d44c04bf03 100644
--- a/gcc/tree-core.h
+++ b/gcc/tree-core.h
@@ -1680,8 +1680,9 @@  struct GTY(()) tree_type_common {
   tree attributes;
   unsigned int uid;
 
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
+
   unsigned int precision : 16;
-  ENUM_BITFIELD(machine_mode) mode : 8;
   unsigned lang_flag_0 : 1;
   unsigned lang_flag_1 : 1;
   unsigned lang_flag_2 : 1;
@@ -1712,7 +1713,7 @@  struct GTY(()) tree_type_common {
   unsigned empty_flag : 1;
   unsigned indivisible_p : 1;
   unsigned no_named_args_stdarg_p : 1;
-  unsigned spare : 9;
+  unsigned spare : 1;
 
   alias_set_type alias_set;
   tree pointer_to;
@@ -1770,7 +1771,7 @@  struct GTY(()) tree_decl_common {
   struct tree_decl_minimal common;
   tree size;
 
-  ENUM_BITFIELD(machine_mode) mode : 8;
+  ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
 
   unsigned nonlocal_flag : 1;
   unsigned virtual_flag : 1;
@@ -1828,7 +1829,7 @@  struct GTY(()) tree_decl_common {
   /* In FIELD_DECL, this is DECL_NOT_FLEXARRAY.  */
   unsigned int decl_not_flexarray : 1;
 
-  /* 13 bits unused.  */
+  /* 5 bits unused.  */
 
   /* UID for points-to sets, stable over copying from inlining.  */
   unsigned int pt_uid;