| Message ID | 20230510133036.596530-12-christophe.lyon@arm.com |
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To: <gcc-patches@gcc.gnu.org>, <kyrylo.tkachov@arm.com>,
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CC: Christophe Lyon <christophe.lyon@arm.com>
Subject: [PATCH 12/20] arm: [MVE intrinsics] factorize vaddvaq
Date: Wed, 10 May 2023 15:30:28 +0200
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|
| Series |
[01/20] arm: [MVE intrinsics] factorize vcmp
|
|
Checks
| Context | Check | Description |
|---|---|---|
| snail/gcc-patch-check | success | Github commit url |
Commit Message
Christophe Lyon
May 10, 2023, 1:30 p.m. UTC
Factorize vaddvaq builtins so that they use parameterized names. 2022-10-25 Christophe Lyon <christophe.lyon@arm.com> gcc/ * config/arm/iterators.md (mve_insn): Add vaddva. * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ... (@mve_<mve_insn>q_<supf><mode>): ... this. (mve_vaddvaq_p_<supf><mode>): Rename into ... (@mve_<mve_insn>q_p_<supf><mode>): ... this. --- gcc/config/arm/iterators.md | 2 ++ gcc/config/arm/mve.md | 8 ++++---- 2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 46c7ddeda67..00123c0a376 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -762,6 +762,8 @@ (define_int_attr mve_insn [ (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd") (VADDQ_M_S "vadd") (VADDQ_M_U "vadd") (VADDQ_M_F "vadd") (VADDQ_N_S "vadd") (VADDQ_N_U "vadd") (VADDQ_N_F "vadd") + (VADDVAQ_P_S "vaddva") (VADDVAQ_P_U "vaddva") + (VADDVAQ_S "vaddva") (VADDVAQ_U "vaddva") (VADDVQ_P_S "vaddv") (VADDVQ_P_U "vaddv") (VADDVQ_S "vaddv") (VADDVQ_U "vaddv") (VANDQ_M_S "vand") (VANDQ_M_U "vand") (VANDQ_M_F "vand") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index d772f4d4380..1ccbce3c89c 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -758,7 +758,7 @@ (define_insn "@mve_<mve_insn>q_n_<supf><mode>" ;; ;; [vaddvaq_s, vaddvaq_u]) ;; -(define_insn "mve_vaddvaq_<supf><mode>" +(define_insn "@mve_<mve_insn>q_<supf><mode>" [ (set (match_operand:SI 0 "s_register_operand" "=Te") (unspec:SI [(match_operand:SI 1 "s_register_operand" "0") @@ -766,7 +766,7 @@ (define_insn "mve_vaddvaq_<supf><mode>" VADDVAQ)) ] "TARGET_HAVE_MVE" - "vaddva.<supf>%#<V_sz_elem>\t%0, %q2" + "<mve_insn>.<supf>%#<V_sz_elem>\t%0, %q2" [(set_attr "type" "mve_move") ]) @@ -1944,7 +1944,7 @@ (define_insn "@mve_<mve_insn>q_m_<supf><mode>" ;; ;; [vaddvaq_p_u, vaddvaq_p_s]) ;; -(define_insn "mve_vaddvaq_p_<supf><mode>" +(define_insn "@mve_<mve_insn>q_p_<supf><mode>" [ (set (match_operand:SI 0 "s_register_operand" "=Te") (unspec:SI [(match_operand:SI 1 "s_register_operand" "0") @@ -1953,7 +1953,7 @@ (define_insn "mve_vaddvaq_p_<supf><mode>" VADDVAQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddvat.<supf>%#<V_sz_elem> %0, %q2" + "vpst\;<mve_insn>t.<supf>%#<V_sz_elem>\t%0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")])