RISC-V: Update RVV integer compare simplification comments

Message ID 20230508085428.4074457-1-pan2.li@intel.com
State Accepted
Headers
Series RISC-V: Update RVV integer compare simplification comments |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Li, Pan2 via Gcc-patches May 8, 2023, 8:54 a.m. UTC
  From: Pan Li <pan2.li@intel.com>

The VMSET simplification RVV integer comparision has merged already.
This patch would like to update the comments for the cases that the
define_split will act on.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/ChangeLog:

	* config/riscv/vector.md: Add comments for simplifying to vmset.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 gcc/config/riscv/vector.md | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
  

Comments

Jeff Law May 8, 2023, 10:05 p.m. UTC | #1
On 5/8/23 02:54, Pan Li via Gcc-patches wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> The VMSET simplification RVV integer comparision has merged already.
> This patch would like to update the comments for the cases that the
> define_split will act on.
> 
> Signed-off-by: Pan Li <pan2.li@intel.com>
> 
> gcc/ChangeLog:
> 
> 	* config/riscv/vector.md: Add comments for simplifying to vmset.
OK.  Thanks.
jeff
  
Li, Pan2 via Gcc-patches May 11, 2023, 2:33 a.m. UTC | #2
Hi Jeff,

Thanks a lot. If no more comments, I can commit it to trunk later, 😊.

Pan

-----Original Message-----
From: Jeff Law <jeffreyalaw@gmail.com> 
Sent: Tuesday, May 9, 2023 6:06 AM
To: Li, Pan2 <pan2.li@intel.com>; gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai; kito.cheng@sifive.com; Wang, Yanzhang <yanzhang.wang@intel.com>
Subject: Re: [PATCH] RISC-V: Update RVV integer compare simplification comments



On 5/8/23 02:54, Pan Li via Gcc-patches wrote:
> From: Pan Li <pan2.li@intel.com>
> 
> The VMSET simplification RVV integer comparision has merged already.
> This patch would like to update the comments for the cases that the 
> define_split will act on.
> 
> Signed-off-by: Pan Li <pan2.li@intel.com>
> 
> gcc/ChangeLog:
> 
> 	* config/riscv/vector.md: Add comments for simplifying to vmset.
OK.  Thanks.
jeff
  

Patch

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 9ccc0d6a513..9904d4ca5e2 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -8159,13 +8159,20 @@  (define_insn "@pred_indexed_<order>store<V64T:mode><V64I:mode>"
 ;; -----------------------------------------------------------------------------
 ;; ---- Integer Compare Instructions Simplification
 ;; -----------------------------------------------------------------------------
-;; Simplify to VMCLR.m Includes:
+;; Simplify OP(V, V) Instructions to VMCLR.m Includes:
 ;; - 1.  VMSNE
 ;; - 2.  VMSLT
 ;; - 3.  VMSLTU
 ;; - 4.  VMSGT
 ;; - 5.  VMSGTU
 ;; -----------------------------------------------------------------------------
+;; Simplify OP(V, V) Instructions to VMSET.m Includes:
+;; - 1.  VMSEQ
+;; - 2.  VMSLE
+;; - 3.  VMSLEU
+;; - 4.  VMSGE
+;; - 5.  VMSGEU
+;; -----------------------------------------------------------------------------
 (define_split
   [(set (match_operand:VB      0 "register_operand")
 	(if_then_else:VB