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[8.43.85.97]) by mx.google.com with ESMTPS id jg37-20020a170907972500b0094f62f69fccsi5361490ejc.645.2023.05.07.13.14.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 13:14:37 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="JulK8XH/"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A97273858284 for ; Sun, 7 May 2023 20:14:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A97273858284 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1683490476; bh=my5/+wcSG7m0l9w/LEFKkgjB9K5U3e0Rl0bCk430B6s=; h=To:CC:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=JulK8XH/F1rli2iTL2S9/7AYOJIkUPbDhh/C/WHBJkhBQsHv0GDPZk82Qn2ESleP+ CbfpKF5TNGo5+Yk3J5/eFMvYmm47VbweajcP/PHDSwHmPuKu83Wtlok1MQow+pj2Q/ UCVmbSYvs+Q4aOBV+MyvxZqMk7BoIuZ4Kh7VN6TQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id 5818A3858D28 for ; Sun, 7 May 2023 20:13:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5818A3858D28 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 347Jwf9p027062 for ; Sun, 7 May 2023 13:13:51 -0700 Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qdm8t3p0n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sun, 07 May 2023 13:13:50 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sun, 7 May 2023 13:13:49 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sun, 7 May 2023 13:13:49 -0700 Received: from vpnclient.wrightpinski.org.com (unknown [10.69.242.187]) by maili.marvell.com (Postfix) with ESMTP id 05A4B3F7057; Sun, 7 May 2023 13:13:47 -0700 (PDT) To: CC: Andrew Pinski Subject: [PATCH] [GCC 13] Fix aarch64/109762: push_options/push_options does not work sometimes Date: Sun, 7 May 2023 13:13:00 -0700 Message-ID: <20230507201300.1161530-1-apinski@marvell.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Proofpoint-GUID: CxpJUWAgxktTrAPCoHu3yjs4uIzRfXzy X-Proofpoint-ORIG-GUID: CxpJUWAgxktTrAPCoHu3yjs4uIzRfXzy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-07_07,2023-05-05_01,2023-02-09_01 X-Spam-Status: No, score=-14.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrew Pinski via Gcc-patches From: Andrew Pinski Reply-To: Andrew Pinski Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765249629008348524?= X-GMAIL-MSGID: =?utf-8?q?1765267711059753644?= aarch64_isa_flags (and aarch64_asm_isa_flags) are both aarch64_feature_flags (uint64_t) but since r12-8000-g14814e20161d, they are saved/restored as unsigned long. This does not make a difference for LP64 targets but on ILP32 and LLP64IL32 targets, it means it does not get restored correctly. This patch changes over to use aarch64_feature_flags instead of unsigned long. Committed as obvious to gcc 13 branch after a bootstrap/test. gcc/ChangeLog: PR target/109762 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher): Change argument type to aarch64_feature_flags. * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change constructor argument type to aarch64_feature_flags. Change m_old_asm_isa_flags to be aarch64_feature_flags. (cherry picked from commit a1a9ce2441df0675540faee8476523164e12578b) --- gcc/config/aarch64/aarch64-builtins.cc | 2 +- gcc/config/aarch64/aarch64-protos.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index cc6b7c01fd1..4ee6cb00f8b 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -1547,7 +1547,7 @@ aarch64_scalar_builtin_type_p (aarch64_simd_type t) /* Enable AARCH64_FL_* flags EXTRA_FLAGS on top of the base Advanced SIMD set. */ -aarch64_simd_switcher::aarch64_simd_switcher (unsigned int extra_flags) +aarch64_simd_switcher::aarch64_simd_switcher (aarch64_feature_flags extra_flags) : m_old_asm_isa_flags (aarch64_asm_isa_flags), m_old_general_regs_only (TARGET_GENERAL_REGS_ONLY) { diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index 63339fa47df..e727e207367 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -733,11 +733,11 @@ const unsigned int AARCH64_BUILTIN_CLASS = (1 << AARCH64_BUILTIN_SHIFT) - 1; class aarch64_simd_switcher { public: - aarch64_simd_switcher (unsigned int extra_flags = 0); + aarch64_simd_switcher (aarch64_feature_flags extra_flags = 0); ~aarch64_simd_switcher (); private: - unsigned long m_old_asm_isa_flags; + aarch64_feature_flags m_old_asm_isa_flags; bool m_old_general_regs_only; };