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(max_min_su_str): New. (max_min_supf): New. * config/arm/mve.md (mve_vmaxq_s, mve_vmaxq_u) (mve_vminq_s, mve_vminq_u): Merge into ... (mve_q_): ... this. --- gcc/config/arm/iterators.md | 11 ++++++++++ gcc/config/arm/mve.md | 44 +++++-------------------------------- 2 files changed, 16 insertions(+), 39 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 3133642ea82..9ff61e0573b 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -330,6 +330,9 @@ (define_code_iterator FCVT [unsigned_float float]) ;; Saturating addition, subtraction (define_code_iterator SSPLUSMINUS [ss_plus ss_minus]) +;; Max/Min iterator, to factorize MVE patterns +(define_code_iterator MAX_MIN_SU [smax umax smin umin]) + ;; MVE integer binary operations. (define_code_iterator MVE_INT_BINARY_RTX [plus minus mult]) @@ -1271,6 +1274,14 @@ (define_code_attr float_sup [(unsigned_float "u") (float "s")]) (define_code_attr float_SUP [(unsigned_float "U") (float "S")]) +;; max/min for MVE +(define_code_attr max_min_su_str [(smax "vmax") (umax "vmax") (smin "vmin") (umin "vmin")]) + +(define_code_attr max_min_supf [ + (smax "s") (umax "u") + (smin "s") (umin "u") + ]) + ;;---------------------------------------------------------------------------- ;; Int attributes ;;---------------------------------------------------------------------------- diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index c8cb4e430ac..44409b40e5f 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1106,29 +1106,20 @@ (define_insn "mve_vmaxavq_s" ]) ;; -;; [vmaxq_u, vmaxq_s]) +;; [vmaxq_u, vmaxq_s] +;; [vminq_s, vminq_u] ;; -(define_insn "mve_vmaxq_s" +(define_insn "mve_q_" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (smax:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w") + (MAX_MIN_SU:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w") (match_operand:MVE_2 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vmax.%#\t%q0, %q1, %q2" + ".%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) -(define_insn "mve_vmaxq_u" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (umax:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w"))) - ] - "TARGET_HAVE_MVE" - "vmax.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) ;; ;; [vmaxvq_u, vmaxvq_s]) @@ -1175,31 +1166,6 @@ (define_insn "mve_vminavq_s" [(set_attr "type" "mve_move") ]) -;; -;; [vminq_s, vminq_u]) -;; -(define_insn "mve_vminq_s" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (smin:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w"))) - ] - "TARGET_HAVE_MVE" - "vmin.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -(define_insn "mve_vminq_u" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (umin:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w"))) - ] - "TARGET_HAVE_MVE" - "vmin.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vminvq_u, vminvq_s]) ;;