From patchwork Fri Apr 28 06:12:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christoph_M=C3=BCllner?= X-Patchwork-Id: 88454 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp728966vqo; Thu, 27 Apr 2023 23:16:16 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ49OzfwQ5qKcxfOJHwbe5v+Z9qq2KIjuW7Od1+7jHdIDVauRJ4jzCk3hJWU2gxTVmbqR8kT X-Received: by 2002:a17:906:c153:b0:957:800:912f with SMTP id dp19-20020a170906c15300b009570800912fmr3967402ejc.71.1682662576679; Thu, 27 Apr 2023 23:16:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682662576; cv=none; d=google.com; s=arc-20160816; b=x0HaqUGn+TtefJlEOpJKmjcwCfyQYhqlpw5ZM9oEa7wikL8sUvycmVBchtoi9hbXRV Jq9+9y0ueEPXRwJLhoSbKUYvc6EW9MY0Xi5Jo/S0zTn928ijnvFzakeZWm0lfwLd6iTq GjVi66TkcltVCWwT8LsC75bqgsVrukaHE2/ZDbthp36i/JyC7BvMi5Czntbb/nk2PbYR pfyMOn1hFsOXy/BeQXe2TabghmC6fuWvocnNV13GZNv2GwiwTj/DeOMHlZGdo4SmszJk Lnb+/Fh2tTAxTcQ6ASz2mWbKlvabN0qYiI1tYRnZxrI1d6fjsvEgiTN2vV517d5Lvs6k Fuyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:dmarc-filter:delivered-to; bh=z+H6VC4UCtSwD/YYDi1wqQehV4k/KvJMoU6j35Tb8Yw=; b=kojrQcspmBTZMmlmbv8HhFmp+W7bKXYJqX7tOzmCYgUg+8JwrcS9Az0FIMBvNRgIl0 Xb4ugwZR2IYEifZizigjIRrq600D5VJi7NooPJhKsupWrkR5gsniSqwSIG6ID2EpzPXp 5Dj6vYGeK2lZAJCvgNDFWduaASdrHAm7VFm622hB5oZx8bEdn/hgfLAoc9bz7D6TcRGR uxOx19lu+iVD8y41bpZ3B6zuO/WJF01UYUnkg84X/H+2s1aL4asVSQ+YrVh6xl7ajL+L dOeIAjT81rzd3SOIn1YaQmghSvw8oI6ViWbVb27G/xsPKLCRCnI0DqrV6/jMvWBc0YR8 MFvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@vrull.eu header.s=google header.b=jjzjsE4U; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id a10-20020aa7cf0a000000b00501d4f9e38esi16351892edy.595.2023.04.27.23.16.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 23:16:16 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@vrull.eu header.s=google header.b=jjzjsE4U; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 334563858288 for ; Fri, 28 Apr 2023 06:13:23 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [IPv6:2a00:1450:4864:20::62e]) by sourceware.org (Postfix) with ESMTPS id D652D3857000 for ; Fri, 28 Apr 2023 06:12:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D652D3857000 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-94ef8b88a5bso1446548666b.2 for ; Thu, 27 Apr 2023 23:12:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; t=1682662344; x=1685254344; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=z+H6VC4UCtSwD/YYDi1wqQehV4k/KvJMoU6j35Tb8Yw=; b=jjzjsE4UPNblj9mo16MZaf6HWeAoz1DcGC27r8x3qXlJrb2/fYiulLOY/A6wRjQpbv jdLDr0Dk1yeFndOTAYy6gYq36C+Qh6FemOJe6qdO0Q/4J2jgoDjk7RpBHc7INCjBAkmo amLR232lv7vTEbj7ILU22uum05Gpbu5z/XXZ3+iL5Z/nDc6TbQOSYhgQDQ/SW7v1EzvE MdEO5QwOZ0k4zWydKfTd2DzOzVZCAt2DFLayTYZA9K3IxP4QWF8oeibuS/i2uhVM6CA4 /dmTvl+0AWJulw7Ns4CFvi5gxId8wQxRbz7WQ0rM1TBwiPTviSlCFWEUwDYjOS5+F9lw +DjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682662344; x=1685254344; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=z+H6VC4UCtSwD/YYDi1wqQehV4k/KvJMoU6j35Tb8Yw=; b=kjrA1R5LV6hzZyXA+fAKbNRqZ/jc0RmcztX4xlecQbVGp7vMX2FvobP0NxkDExbT9b 6YRvTrL5tXfZgGfzoya/lhboP6CPGUJZfScSXeNC+yqDIhb3mI2lQWFxmceuxKwYUy/h m9Qb31zphETIIlEEmzACUkF6+/59cvvkuBjH4gMyPiFuN/m3l7HuFia2EmAMzyHiwXYI Can5MaoLby+oth6vzdD47yzDDOn29jkkh5Si2D2gQ2iNceFD2yMTD4IWviCyQn+j6gM6 HXMmPUjmypPVooCekyWGVZcBE5Q26Ei1yt0JxUCNYIUfTDPbKbMIVCcvwym9l+0TN4q0 U17Q== X-Gm-Message-State: AC+VfDzvk5wufAHNUDWHgc8HHF4uR/71Dif9pUCN9WdKhNvT9d5BGey8 GTDwAjltnpIN/CvefJzQof76XqwzxwdmOhKzkro= X-Received: by 2002:a17:907:7f1c:b0:958:772e:e926 with SMTP id qf28-20020a1709077f1c00b00958772ee926mr4352894ejc.24.1682662343932; Thu, 27 Apr 2023 23:12:23 -0700 (PDT) Received: from beast.fritz.box (62-178-148-172.cable.dynamic.surfer.at. [62.178.148.172]) by smtp.gmail.com with ESMTPSA id x20-20020aa7d394000000b00504803f4071sm8669431edq.44.2023.04.27.23.12.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 23:12:23 -0700 (PDT) From: Christoph Muellner To: gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Cc: =?utf-8?q?Christoph_M=C3=BCllner?= Subject: [PATCH 07/11] riscv: Move address classification info types to riscv-protos.h Date: Fri, 28 Apr 2023 08:12:08 +0200 Message-Id: <20230428061210.2988035-8-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230428061210.2988035-1-christoph.muellner@vrull.eu> References: <20230428061210.2988035-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_MANYTO, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764399594115717840?= X-GMAIL-MSGID: =?utf-8?q?1764399594115717840?= From: Christoph Müllner enum riscv_address_type and struct riscv_address_info are used to store address classification information. Let's move this types into our common header file in order to share them with other compilation units. This is a non-functional change without any intendet side-effects. gcc/ChangeLog: * config/riscv/riscv-protos.h (enum riscv_address_type): New location of type definition. (struct riscv_address_info): Likewise. * config/riscv/riscv.cc (enum riscv_address_type): Old location of type definition. (struct riscv_address_info): Likewise. Signed-off-by: Christoph Müllner --- gcc/config/riscv/riscv-protos.h | 43 +++++++++++++++++++++++++++++++++ gcc/config/riscv/riscv.cc | 43 --------------------------------- 2 files changed, 43 insertions(+), 43 deletions(-) diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 5244e8dcbf0..628c64cf628 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -35,6 +35,49 @@ enum riscv_symbol_type { }; #define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1) +/* Classifies an address. + + ADDRESS_REG + A natural register + offset address. The register satisfies + riscv_valid_base_register_p and the offset is a const_arith_operand. + + ADDRESS_LO_SUM + A LO_SUM rtx. The first operand is a valid base register and + the second operand is a symbolic address. + + ADDRESS_CONST_INT + A signed 16-bit constant address. + + ADDRESS_SYMBOLIC: + A constant symbolic address. */ +enum riscv_address_type { + ADDRESS_REG, + ADDRESS_LO_SUM, + ADDRESS_CONST_INT, + ADDRESS_SYMBOLIC +}; + +/* Information about an address described by riscv_address_type. + + ADDRESS_CONST_INT + No fields are used. + + ADDRESS_REG + REG is the base register and OFFSET is the constant offset. + + ADDRESS_LO_SUM + REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE + is the type of symbol it references. + + ADDRESS_SYMBOLIC + SYMBOL_TYPE is the type of symbol that the address references. */ +struct riscv_address_info { + enum riscv_address_type type; + rtx reg; + rtx offset; + enum riscv_symbol_type symbol_type; +}; + /* Routines implemented in riscv.cc. */ extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx); extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *); diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 92043236b17..8388235d8cc 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -81,28 +81,6 @@ along with GCC; see the file COPYING3. If not see /* True if bit BIT is set in VALUE. */ #define BITSET_P(VALUE, BIT) (((VALUE) & (1ULL << (BIT))) != 0) -/* Classifies an address. - - ADDRESS_REG - A natural register + offset address. The register satisfies - riscv_valid_base_register_p and the offset is a const_arith_operand. - - ADDRESS_LO_SUM - A LO_SUM rtx. The first operand is a valid base register and - the second operand is a symbolic address. - - ADDRESS_CONST_INT - A signed 16-bit constant address. - - ADDRESS_SYMBOLIC: - A constant symbolic address. */ -enum riscv_address_type { - ADDRESS_REG, - ADDRESS_LO_SUM, - ADDRESS_CONST_INT, - ADDRESS_SYMBOLIC -}; - /* Information about a function's frame layout. */ struct GTY(()) riscv_frame_info { /* The size of the frame in bytes. */ @@ -182,27 +160,6 @@ struct riscv_arg_info { unsigned int fpr_offset; }; -/* Information about an address described by riscv_address_type. - - ADDRESS_CONST_INT - No fields are used. - - ADDRESS_REG - REG is the base register and OFFSET is the constant offset. - - ADDRESS_LO_SUM - REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE - is the type of symbol it references. - - ADDRESS_SYMBOLIC - SYMBOL_TYPE is the type of symbol that the address references. */ -struct riscv_address_info { - enum riscv_address_type type; - rtx reg; - rtx offset; - enum riscv_symbol_type symbol_type; -}; - /* One stage in a constant building sequence. These sequences have the form: