[07/11] riscv: Move address classification info types to riscv-protos.h

Message ID 20230428061210.2988035-8-christoph.muellner@vrull.eu
State Accepted
Headers
Series Improvements for XThead* support |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Christoph Müllner April 28, 2023, 6:12 a.m. UTC
  From: Christoph Müllner <christoph.muellner@vrull.eu>

enum riscv_address_type and struct riscv_address_info are used
to store address classification information. Let's move this types
into our common header file in order to share them with other
compilation units.

This is a non-functional change without any intendet side-effects.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (enum riscv_address_type):
	New location of type definition.
	(struct riscv_address_info): Likewise.
	* config/riscv/riscv.cc (enum riscv_address_type):
	Old location of type definition.
	(struct riscv_address_info): Likewise.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
 gcc/config/riscv/riscv-protos.h | 43 +++++++++++++++++++++++++++++++++
 gcc/config/riscv/riscv.cc       | 43 ---------------------------------
 2 files changed, 43 insertions(+), 43 deletions(-)
  

Comments

Kito Cheng April 28, 2023, 7:23 a.m. UTC | #1
OK :)

On Fri, Apr 28, 2023 at 2:15 PM Christoph Muellner
<christoph.muellner@vrull.eu> wrote:
>
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> enum riscv_address_type and struct riscv_address_info are used
> to store address classification information. Let's move this types
> into our common header file in order to share them with other
> compilation units.
>
> This is a non-functional change without any intendet side-effects.
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv-protos.h (enum riscv_address_type):
>         New location of type definition.
>         (struct riscv_address_info): Likewise.
>         * config/riscv/riscv.cc (enum riscv_address_type):
>         Old location of type definition.
>         (struct riscv_address_info): Likewise.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
>  gcc/config/riscv/riscv-protos.h | 43 +++++++++++++++++++++++++++++++++
>  gcc/config/riscv/riscv.cc       | 43 ---------------------------------
>  2 files changed, 43 insertions(+), 43 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
> index 5244e8dcbf0..628c64cf628 100644
> --- a/gcc/config/riscv/riscv-protos.h
> +++ b/gcc/config/riscv/riscv-protos.h
> @@ -35,6 +35,49 @@ enum riscv_symbol_type {
>  };
>  #define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1)
>
> +/* Classifies an address.
> +
> +   ADDRESS_REG
> +       A natural register + offset address.  The register satisfies
> +       riscv_valid_base_register_p and the offset is a const_arith_operand.
> +
> +   ADDRESS_LO_SUM
> +       A LO_SUM rtx.  The first operand is a valid base register and
> +       the second operand is a symbolic address.
> +
> +   ADDRESS_CONST_INT
> +       A signed 16-bit constant address.
> +
> +   ADDRESS_SYMBOLIC:
> +       A constant symbolic address.  */
> +enum riscv_address_type {
> +  ADDRESS_REG,
> +  ADDRESS_LO_SUM,
> +  ADDRESS_CONST_INT,
> +  ADDRESS_SYMBOLIC
> +};
> +
> +/* Information about an address described by riscv_address_type.
> +
> +   ADDRESS_CONST_INT
> +       No fields are used.
> +
> +   ADDRESS_REG
> +       REG is the base register and OFFSET is the constant offset.
> +
> +   ADDRESS_LO_SUM
> +       REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE
> +       is the type of symbol it references.
> +
> +   ADDRESS_SYMBOLIC
> +       SYMBOL_TYPE is the type of symbol that the address references.  */
> +struct riscv_address_info {
> +  enum riscv_address_type type;
> +  rtx reg;
> +  rtx offset;
> +  enum riscv_symbol_type symbol_type;
> +};
> +
>  /* Routines implemented in riscv.cc.  */
>  extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx);
>  extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *);
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 92043236b17..8388235d8cc 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -81,28 +81,6 @@ along with GCC; see the file COPYING3.  If not see
>  /* True if bit BIT is set in VALUE.  */
>  #define BITSET_P(VALUE, BIT) (((VALUE) & (1ULL << (BIT))) != 0)
>
> -/* Classifies an address.
> -
> -   ADDRESS_REG
> -       A natural register + offset address.  The register satisfies
> -       riscv_valid_base_register_p and the offset is a const_arith_operand.
> -
> -   ADDRESS_LO_SUM
> -       A LO_SUM rtx.  The first operand is a valid base register and
> -       the second operand is a symbolic address.
> -
> -   ADDRESS_CONST_INT
> -       A signed 16-bit constant address.
> -
> -   ADDRESS_SYMBOLIC:
> -       A constant symbolic address.  */
> -enum riscv_address_type {
> -  ADDRESS_REG,
> -  ADDRESS_LO_SUM,
> -  ADDRESS_CONST_INT,
> -  ADDRESS_SYMBOLIC
> -};
> -
>  /* Information about a function's frame layout.  */
>  struct GTY(())  riscv_frame_info {
>    /* The size of the frame in bytes.  */
> @@ -182,27 +160,6 @@ struct riscv_arg_info {
>    unsigned int fpr_offset;
>  };
>
> -/* Information about an address described by riscv_address_type.
> -
> -   ADDRESS_CONST_INT
> -       No fields are used.
> -
> -   ADDRESS_REG
> -       REG is the base register and OFFSET is the constant offset.
> -
> -   ADDRESS_LO_SUM
> -       REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE
> -       is the type of symbol it references.
> -
> -   ADDRESS_SYMBOLIC
> -       SYMBOL_TYPE is the type of symbol that the address references.  */
> -struct riscv_address_info {
> -  enum riscv_address_type type;
> -  rtx reg;
> -  rtx offset;
> -  enum riscv_symbol_type symbol_type;
> -};
> -
>  /* One stage in a constant building sequence.  These sequences have
>     the form:
>
> --
> 2.40.1
>
  

Patch

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 5244e8dcbf0..628c64cf628 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -35,6 +35,49 @@  enum riscv_symbol_type {
 };
 #define NUM_SYMBOL_TYPES (SYMBOL_TLS_GD + 1)
 
+/* Classifies an address.
+
+   ADDRESS_REG
+       A natural register + offset address.  The register satisfies
+       riscv_valid_base_register_p and the offset is a const_arith_operand.
+
+   ADDRESS_LO_SUM
+       A LO_SUM rtx.  The first operand is a valid base register and
+       the second operand is a symbolic address.
+
+   ADDRESS_CONST_INT
+       A signed 16-bit constant address.
+
+   ADDRESS_SYMBOLIC:
+       A constant symbolic address.  */
+enum riscv_address_type {
+  ADDRESS_REG,
+  ADDRESS_LO_SUM,
+  ADDRESS_CONST_INT,
+  ADDRESS_SYMBOLIC
+};
+
+/* Information about an address described by riscv_address_type.
+
+   ADDRESS_CONST_INT
+       No fields are used.
+
+   ADDRESS_REG
+       REG is the base register and OFFSET is the constant offset.
+
+   ADDRESS_LO_SUM
+       REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE
+       is the type of symbol it references.
+
+   ADDRESS_SYMBOLIC
+       SYMBOL_TYPE is the type of symbol that the address references.  */
+struct riscv_address_info {
+  enum riscv_address_type type;
+  rtx reg;
+  rtx offset;
+  enum riscv_symbol_type symbol_type;
+};
+
 /* Routines implemented in riscv.cc.  */
 extern enum riscv_symbol_type riscv_classify_symbolic_expression (rtx);
 extern bool riscv_symbolic_constant_p (rtx, enum riscv_symbol_type *);
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 92043236b17..8388235d8cc 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -81,28 +81,6 @@  along with GCC; see the file COPYING3.  If not see
 /* True if bit BIT is set in VALUE.  */
 #define BITSET_P(VALUE, BIT) (((VALUE) & (1ULL << (BIT))) != 0)
 
-/* Classifies an address.
-
-   ADDRESS_REG
-       A natural register + offset address.  The register satisfies
-       riscv_valid_base_register_p and the offset is a const_arith_operand.
-
-   ADDRESS_LO_SUM
-       A LO_SUM rtx.  The first operand is a valid base register and
-       the second operand is a symbolic address.
-
-   ADDRESS_CONST_INT
-       A signed 16-bit constant address.
-
-   ADDRESS_SYMBOLIC:
-       A constant symbolic address.  */
-enum riscv_address_type {
-  ADDRESS_REG,
-  ADDRESS_LO_SUM,
-  ADDRESS_CONST_INT,
-  ADDRESS_SYMBOLIC
-};
-
 /* Information about a function's frame layout.  */
 struct GTY(())  riscv_frame_info {
   /* The size of the frame in bytes.  */
@@ -182,27 +160,6 @@  struct riscv_arg_info {
   unsigned int fpr_offset;
 };
 
-/* Information about an address described by riscv_address_type.
-
-   ADDRESS_CONST_INT
-       No fields are used.
-
-   ADDRESS_REG
-       REG is the base register and OFFSET is the constant offset.
-
-   ADDRESS_LO_SUM
-       REG and OFFSET are the operands to the LO_SUM and SYMBOL_TYPE
-       is the type of symbol it references.
-
-   ADDRESS_SYMBOLIC
-       SYMBOL_TYPE is the type of symbol that the address references.  */
-struct riscv_address_info {
-  enum riscv_address_type type;
-  rtx reg;
-  rtx offset;
-  enum riscv_symbol_type symbol_type;
-};
-
 /* One stage in a constant building sequence.  These sequences have
    the form: