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[62.178.148.172]) by smtp.gmail.com with ESMTPSA id x20-20020aa7d394000000b00504803f4071sm8669431edq.44.2023.04.27.23.12.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 23:12:20 -0700 (PDT) From: Christoph Muellner To: gcc-patches@gcc.gnu.org, Kito Cheng , Jim Wilson , Palmer Dabbelt , Andrew Waterman , Philipp Tomsich , Cooper Qu , Lifang Xia , Yunhai Shang , Zhiwei Liu Cc: =?utf-8?q?Christoph_M=C3=BCllner?= Subject: [PATCH 05/11] riscv: Simplify output of MEM addresses Date: Fri, 28 Apr 2023 08:12:06 +0200 Message-Id: <20230428061210.2988035-6-christoph.muellner@vrull.eu> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230428061210.2988035-1-christoph.muellner@vrull.eu> References: <20230428061210.2988035-1-christoph.muellner@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_MANYTO, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764399478402277379?= X-GMAIL-MSGID: =?utf-8?q?1764399478402277379?= From: Christoph Müllner We have the following situation for MEM RTX objects: * TARGET_PRINT_OPERAND expands to riscv_print_operand() * This falls into the default case (unknown or on letter) of the outer switch-case-block and the MEM case of the inner switch-case-block and calls output_address() in final.cc with XEXP (op, 0) (the address) * This calls targetm.asm_out.print_operand_address() which is riscv_print_operand_address() * riscv_print_operand_address() is targeting the address of a MEM RTX * riscv_print_operand_address() calls riscv_print_operand() for the offset and directly prints the register if the address is classified as ADDRESS_REG * This falls into the default case (unknown or on letter) of the outer switch-case-block and the default case of the inner switch-case-block and calls output_addr_const(). However, since we know that offset must be a CONST_INT (which will be followed by a '()' string), there is no need to call riscv_print_operand() for the offset. Instead we can take the shortcut and use output_addr_const(). This change also brings the code in riscv_print_operand_address() in line with the other cases, where output_addr_const() is used to print offsets. Tested with GCC regression test suite and SPEC intrate. Signed-off-by: Christoph Müllner --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 5d2550871c7..92043236b17 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -4581,7 +4581,7 @@ riscv_print_operand_address (FILE *file, machine_mode mode ATTRIBUTE_UNUSED, rtx switch (addr.type) { case ADDRESS_REG: - riscv_print_operand (file, addr.offset, 0); + output_addr_const (file, riscv_strip_unspec_address (addr.offset)); fprintf (file, "(%s)", reg_names[REGNO (addr.reg)]); return;