From patchwork Tue Apr 18 13:46:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 84868 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2871355vqo; Tue, 18 Apr 2023 06:59:40 -0700 (PDT) X-Google-Smtp-Source: AKy350YTt7xFraihc8uin/WkOcXfF6KLAZQRXpxmD9+t9D/MqtLN30u7HWtbdff2PnuZ410AUo4f X-Received: by 2002:a17:906:16c4:b0:94f:3338:12a2 with SMTP id t4-20020a17090616c400b0094f333812a2mr9445477ejd.33.1681826380720; Tue, 18 Apr 2023 06:59:40 -0700 (PDT) Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id eu4-20020a170907298400b0094f32041a74si5710479ejc.389.2023.04.18.06.59.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 06:59:40 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=xQujcdVx; arc=fail (signature failed); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 94953394B032 for ; Tue, 18 Apr 2023 13:52:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 94953394B032 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1681825979; bh=mOecWrJ0WM1HCOUIWjwVPGbVJ6IWC0/Dm3X6rnJrOi4=; h=To:CC:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=xQujcdVxLfEFxgLHJzrsuwU++TN4GuG54W6QjdwoCblTazx+pv2w8ZswNfjqfRhkT o7GoBId98a99hWBXqGhEgIR0VG+OxFI0IJZCmjnfzyjqG7j9zGQ+nnyeE2FxXL2sbj WrNNig4IcZVYSZKKRzysV6/q6uREcQi/9fdTvsFg= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2071.outbound.protection.outlook.com [40.107.7.71]) by sourceware.org (Postfix) with ESMTPS id ECB85385700D for ; Tue, 18 Apr 2023 13:47:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org ECB85385700D Received: from DU2PR04CA0058.eurprd04.prod.outlook.com (2603:10a6:10:234::33) by AS2PR08MB10324.eurprd08.prod.outlook.com (2603:10a6:20b:5e7::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6298.45; Tue, 18 Apr 2023 13:47:39 +0000 Received: from DBAEUR03FT032.eop-EUR03.prod.protection.outlook.com (2603:10a6:10:234:cafe::20) by DU2PR04CA0058.outlook.office365.com (2603:10a6:10:234::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6298.47 via Frontend Transport; Tue, 18 Apr 2023 13:47:39 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DBAEUR03FT032.mail.protection.outlook.com (100.127.142.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6319.20 via Frontend Transport; Tue, 18 Apr 2023 13:47:39 +0000 Received: ("Tessian outbound 5bb4c51d5a1f:v136"); Tue, 18 Apr 2023 13:47:39 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: a4d1e908b5791b89 X-CR-MTA-TID: 64aa7808 Received: from acf87bf01fdf.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id EB482879-A603-4387-BF27-FDABFF50A67D.1; Tue, 18 Apr 2023 13:47:32 +0000 Received: from EUR04-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id acf87bf01fdf.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 18 Apr 2023 13:47:32 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=XXnpa9ikWnfQFIDdl9MynP2R8/W3TJiY4vXg4xMhOygW+O8W4iDQEMRJiUBgE9DiuODUjGTLanRFNWxPEkkuTTn2kQhiXwJEhlQ7ZS7PHqjPcFxdRIZ6Lbx8XM8HYI6L0/z+rFLylw2AahnAG0qf3St7OZN5f5baViT54sP9TFXhfu5w3vCnbwDssDWEuBAZUb4k1nms2DpR4YmNTSCx4dReMmPsbAffEh3XcBhAoxvsbvvvICeSCbece9DvYMdOF2KSjeX5w+mGHCSCrkWQ5Sx/1Zq1L0vQQ54yf7Z05nBJflWzlzmEuwqqPhjSxnA23qao0DFKtf10zKBnNH0LXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mOecWrJ0WM1HCOUIWjwVPGbVJ6IWC0/Dm3X6rnJrOi4=; b=g2jpJndmRdys0x9GIrq5p3heS8G7Gua20XtPmQwEZh2gGAXQFx5F4vCZkcpgJf+83O4yBKO6+VrM32wLPi53yKjQddtfL6c87pG7fdLo93yxNZoJCebRQvti/Y9y4Y1FboD6IwIiki087p9NN/lxKvjK1XIV1GwrvpihJ5jJo38seMr217tRGlI5iK4dmx9yXEpLd0UBEdPJxcMG1PxJyZxsS6WP3auZ/iPmLrRoDtAvaiZm6u3ZM6tkghpEZi9fVsve4nxlUMe/gn9J6iMrvsvCVJAQ3FmpTh4MI79EzIj5rCCz/CIveq/ZoYdmOkac5AKmVGF2TphEmXapQ9p4vg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=gcc.gnu.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none Received: from AM6PR0502CA0037.eurprd05.prod.outlook.com (2603:10a6:20b:56::14) by AM8PR08MB6481.eurprd08.prod.outlook.com (2603:10a6:20b:364::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6298.45; Tue, 18 Apr 2023 13:47:30 +0000 Received: from AM7EUR03FT053.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:56:cafe::9f) by AM6PR0502CA0037.outlook.office365.com (2603:10a6:20b:56::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6298.46 via Frontend Transport; Tue, 18 Apr 2023 13:47:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by AM7EUR03FT053.mail.protection.outlook.com (100.127.140.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6319.20 via Frontend Transport; Tue, 18 Apr 2023 13:47:30 +0000 Received: from AZ-NEU-EX03.Arm.com (10.251.24.31) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 18 Apr 2023 13:47:29 +0000 Received: from e129018.arm.com (10.57.54.117) by mail.arm.com (10.251.24.31) with Microsoft SMTP Server id 15.1.2507.23 via Frontend Transport; Tue, 18 Apr 2023 13:47:29 +0000 To: , , , CC: Christophe Lyon Subject: [PATCH 21/22] arm: [MVE intrinsics] factorize several binary operations Date: Tue, 18 Apr 2023 15:46:07 +0200 Message-ID: <20230418134608.244751-22-christophe.lyon@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418134608.244751-1-christophe.lyon@arm.com> References: <20230418134608.244751-1-christophe.lyon@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT053:EE_|AM8PR08MB6481:EE_|DBAEUR03FT032:EE_|AS2PR08MB10324:EE_ X-MS-Office365-Filtering-Correlation-Id: 2fc6fc77-727d-424a-16a2-08db401379d5 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: MHb7ifmtEDVtSXO0ogN4hkKY/Jb3UPXEF/q9Pm4M8MwVNf7oR7hdRnjDGmUo8c1QldPKZTrW4b2ZLChTS3ImxJlJScL4pG4trthIjuHsXq2b64xgjsb7XXkL0YdtcSa3Oe80rRnT3/u6z4QYBUUo2dvZnMujA/PW7JYc3BavaIvgJyHqu9KLaSpFcPeFCHFaSiS8Yu5NkL2B8JDMGGBqLOmUmNyjFYeWQQLBnVX22zvqq/duam78ajFmGwl2Ukqr/jjdSlSYFU8Y+UiL5ZnFqAr1mI0Twabwh0NdKgZFBERltLG6DQizLFtUoKubpxCyotJCj0bNmEBYKBD1KwIwmCle4zIT6RCtHKCAB7B2o4wnArK9bc9GtEJZuwjW2LqLGb4l+JtbsZp7cu1fzT8AQQmw30egf1Usw+nnedhy7FVsKf34czoB/MV9qnaVYDKgfAObKovRpHqKic/2c0jkj9WjE8NS+X3yPaTWnjYlTWbWiR1VtzsdaXNRjnFPy9M+FIZGEfT5C8Tnm9PGXTgMdWwaFFSaTPGbAPxK+IdljnBlZpdaGK1+KOQoPq/X/QrD6QrWoLm3nkZheB3MFl18qHMcUV8woO6U76uU+0LIjiR7+msPu5eAu8Rjkwh05R+/z53aZX9aH4hxFx1bU+jnhAN4A3BGIov4hPwppeJa9eXN/Sk4LuE64vb+0OcyrmwGuSGGqSd3Ep9jRg6NYxileA== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:nebula.arm.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(396003)(136003)(346002)(376002)(39860400002)(451199021)(36840700001)(46966006)(5660300002)(44832011)(86362001)(2616005)(426003)(336012)(82310400005)(6636002)(47076005)(83380400001)(186003)(1076003)(81166007)(356005)(82740400003)(26005)(40480700001)(36860700001)(8676002)(8936002)(478600001)(110136005)(6666004)(7696005)(316002)(41300700001)(36756003)(4326008)(70586007)(70206006)(2906002)(30864003)(36900700001); DIR:OUT; SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB6481 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DBAEUR03FT032.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 031abd2d-681a-4295-30d5-08db40137458 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4diVQOLx+SCwQcT2yJ7eZp/+FugOQD3+i+q7eXMtS15+LMoJEtiAE1aHUoLJM0n53LeQIrUa4cJnSSG6E3fv+OjdfmlEh4V2ffRemUYSqaS5n3uOs54W1fHz6DQIQ5f3cO8s5K8+6j9owKhc2c675+eo9GS2s1joBKuSfB++u3H07gMnPUk3nqmOfB9Xc/es37uwwqJ4tDArbaIkZHLVeCWxm0UWd0ggpHhuzbEkjuMcWiQZYU0Y8/NBJV7vaYWn4Aq6qUZpo0rAvWUzkcZmSiC1+juhINxYXYKPJcuRih7YvnS3eeW98DDcYVIN/t++VkaANa0mRs52FeSGJ/LB9lRanE1kmm5kPrkVKNbIUJw3XTyw5tNtrqg1GimJ2gYa81WM2um9DGapVKV2GRnrqamixC339oCQodjnf5S2D756UJDou7jNm0EEqBrH5zadYjcwSVw0bUGkjcKsqFjqeCDxhnz6BkZb54Tna2zlWWoTOW73qyz3fRzaT5EX0hv8ci8Fhj9ryekhA3DW1voPfzsvznfdvS+uVTv/ceFPo570POUZa/H/5noFgh/MRq7TtFVHS6/vgVeQSBkQKFXirM72hxtzryh6fVyoe00O6YvsaCceJou5Tqioe7YvHZC/8vpTGxanqug9OLCtg13ha46JNln7n+LyibgFFsBypcP3wX4imUpFV7xntxBA0SQb7GrIy7Go+yaZnQ1mmrPTkg== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230028)(4636009)(136003)(396003)(346002)(39850400004)(376002)(451199021)(36840700001)(40470700004)(46966006)(40480700001)(336012)(83380400001)(426003)(2616005)(47076005)(36860700001)(186003)(40460700003)(1076003)(26005)(82740400003)(316002)(4326008)(41300700001)(70586007)(70206006)(2906002)(30864003)(44832011)(81166007)(86362001)(110136005)(6636002)(82310400005)(478600001)(36756003)(7696005)(8676002)(8936002)(5660300002)(6666004); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Apr 2023 13:47:39.5465 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2fc6fc77-727d-424a-16a2-08db401379d5 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT032.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB10324 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Christophe Lyon via Gcc-patches From: Christophe Lyon Reply-To: Christophe Lyon Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763522778597081275?= X-GMAIL-MSGID: =?utf-8?q?1763522778597081275?= Factorize vabdq, vhaddq, vhsubq, vmulhq, vqaddq_u, vqdmulhq, vqrdmulhq, vqrshlq, vqshlq, vqsubq_u, vrhaddq, vrmulhq, vrshlq so that they use the same pattern. 2022-09-08 Christophe Lyon gcc/ * config/arm/iterators.md (MVE_INT_SU_BINARY): New. (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq, vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq. (supf): Add VQDMULHQ_S, VQRDMULHQ_S. * config/arm/mve.md (mve_vabdq_) (@mve_vhaddq_, mve_vhsubq_) (mve_vmulhq_, mve_vqaddq_) (mve_vqdmulhq_s, mve_vqrdmulhq_s) (mve_vqrshlq_, mve_vqshlq_) (mve_vqsubq_, @mve_vrhaddq_) (mve_vrmulhq_, mve_vrshlq_): Merge into ... (@mve_q_): ... this. * config/arm/vec-common.md (avg3_floor, uavg3_floor) (avg3_ceil, uavg3_ceil): Use gen_mve_q instead of gen_mve_vhaddq / gen_mve_vrhaddq. --- gcc/config/arm/iterators.md | 31 ++++++ gcc/config/arm/mve.md | 198 +++-------------------------------- gcc/config/arm/vec-common.md | 8 +- 3 files changed, 50 insertions(+), 187 deletions(-) diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 60452cdefe3..068ae25e578 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -414,6 +414,22 @@ (define_int_iterator MVE_INT_SU_N_BINARY [ VQSUBQ_N_S VQSUBQ_N_U ]) +(define_int_iterator MVE_INT_SU_BINARY [ + VABDQ_S VABDQ_U + VHADDQ_S VHADDQ_U + VHSUBQ_S VHSUBQ_U + VMULHQ_S VMULHQ_U + VQADDQ_S VQADDQ_U + VQDMULHQ_S + VQRDMULHQ_S + VQRSHLQ_S VQRSHLQ_U + VQSHLQ_S VQSHLQ_U + VQSUBQ_S VQSUBQ_U + VRHADDQ_S VRHADDQ_U + VRMULHQ_S VRMULHQ_U + VRSHLQ_S VRSHLQ_U + ]) + (define_int_iterator MVE_INT_N_BINARY_LOGIC [ VBICQ_N_S VBICQ_N_U VORRQ_N_S VORRQ_N_U @@ -456,6 +472,7 @@ (define_code_attr mve_addsubmul [ (define_int_attr mve_insn [ (VABDQ_M_S "vabd") (VABDQ_M_U "vabd") + (VABDQ_S "vabd") (VABDQ_U "vabd") (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd") (VADDQ_M_S "vadd") (VADDQ_M_U "vadd") (VADDQ_M_F "vadd") (VADDQ_N_S "vadd") (VADDQ_N_U "vadd") (VADDQ_N_F "vadd") @@ -468,14 +485,17 @@ (define_int_attr mve_insn [ (VHADDQ_M_N_S "vhadd") (VHADDQ_M_N_U "vhadd") (VHADDQ_M_S "vhadd") (VHADDQ_M_U "vhadd") (VHADDQ_N_S "vhadd") (VHADDQ_N_U "vhadd") + (VHADDQ_S "vhadd") (VHADDQ_U "vhadd") (VHSUBQ_M_N_S "vhsub") (VHSUBQ_M_N_U "vhsub") (VHSUBQ_M_S "vhsub") (VHSUBQ_M_U "vhsub") (VHSUBQ_N_S "vhsub") (VHSUBQ_N_U "vhsub") + (VHSUBQ_S "vhsub") (VHSUBQ_U "vhsub") (VMAXQ_M_S "vmax") (VMAXQ_M_U "vmax") (VMINQ_M_S "vmin") (VMINQ_M_U "vmin") (VMLAQ_M_N_S "vmla") (VMLAQ_M_N_U "vmla") (VMLASQ_M_N_S "vmlas") (VMLASQ_M_N_U "vmlas") (VMULHQ_M_S "vmulh") (VMULHQ_M_U "vmulh") + (VMULHQ_S "vmulh") (VMULHQ_U "vmulh") (VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul") (VMULQ_M_S "vmul") (VMULQ_M_U "vmul") (VMULQ_M_F "vmul") (VMULQ_N_S "vmul") (VMULQ_N_U "vmul") (VMULQ_N_F "vmul") @@ -485,6 +505,7 @@ (define_int_attr mve_insn [ (VQADDQ_M_N_S "vqadd") (VQADDQ_M_N_U "vqadd") (VQADDQ_M_S "vqadd") (VQADDQ_M_U "vqadd") (VQADDQ_N_S "vqadd") (VQADDQ_N_U "vqadd") + (VQADDQ_S "vqadd") (VQADDQ_U "vqadd") (VQDMLADHQ_M_S "vqdmladh") (VQDMLADHXQ_M_S "vqdmladhx") (VQDMLAHQ_M_N_S "vqdmlah") @@ -494,6 +515,7 @@ (define_int_attr mve_insn [ (VQDMULHQ_M_N_S "vqdmulh") (VQDMULHQ_M_S "vqdmulh") (VQDMULHQ_N_S "vqdmulh") + (VQDMULHQ_S "vqdmulh") (VQRDMLADHQ_M_S "vqrdmladh") (VQRDMLADHXQ_M_S "vqrdmladhx") (VQRDMLAHQ_M_N_S "vqrdmlah") @@ -503,14 +525,21 @@ (define_int_attr mve_insn [ (VQRDMULHQ_M_N_S "vqrdmulh") (VQRDMULHQ_M_S "vqrdmulh") (VQRDMULHQ_N_S "vqrdmulh") + (VQRDMULHQ_S "vqrdmulh") (VQRSHLQ_M_S "vqrshl") (VQRSHLQ_M_U "vqrshl") + (VQRSHLQ_S "vqrshl") (VQRSHLQ_U "vqrshl") (VQSHLQ_M_S "vqshl") (VQSHLQ_M_U "vqshl") + (VQSHLQ_S "vqshl") (VQSHLQ_U "vqshl") (VQSUBQ_M_N_S "vqsub") (VQSUBQ_M_N_U "vqsub") (VQSUBQ_M_S "vqsub") (VQSUBQ_M_U "vqsub") (VQSUBQ_N_S "vqsub") (VQSUBQ_N_U "vqsub") + (VQSUBQ_S "vqsub") (VQSUBQ_U "vqsub") (VRHADDQ_M_S "vrhadd") (VRHADDQ_M_U "vrhadd") + (VRHADDQ_S "vrhadd") (VRHADDQ_U "vrhadd") (VRMULHQ_M_S "vrmulh") (VRMULHQ_M_U "vrmulh") + (VRMULHQ_S "vrmulh") (VRMULHQ_U "vrmulh") (VRSHLQ_M_S "vrshl") (VRSHLQ_M_U "vrshl") + (VRSHLQ_S "vrshl") (VRSHLQ_U "vrshl") (VSHLQ_M_S "vshl") (VSHLQ_M_U "vshl") (VSUBQ_M_N_S "vsub") (VSUBQ_M_N_U "vsub") (VSUBQ_M_N_F "vsub") (VSUBQ_M_S "vsub") (VSUBQ_M_U "vsub") (VSUBQ_M_F "vsub") @@ -1669,6 +1698,8 @@ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s") (VQRDMLASHQ_M_N_S "s") (VQDMULHQ_M_N_S "s") (VQRDMULHQ_M_N_S "s") + (VQDMULHQ_S "s") + (VQRDMULHQ_S "s") ]) ;; Both kinds of return insn. diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index d14a04d5f82..b9126af2aa9 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -841,16 +841,28 @@ (define_insn "mve_vcmpq_n_" ;; ;; [vabdq_s, vabdq_u]) +;; [vhaddq_s, vhaddq_u]) +;; [vhsubq_s, vhsubq_u]) +;; [vmulhq_s, vmulhq_u]) +;; [vqaddq_u, vqaddq_s]) +;; [vqdmulhq_s]) +;; [vqrdmulhq_s]) +;; [vqrshlq_s, vqrshlq_u]) +;; [vqshlq_s, vqshlq_u]) +;; [vqsubq_u, vqsubq_s]) +;; [vrhaddq_s, vrhaddq_u]) +;; [vrmulhq_s, vrmulhq_u]) +;; [vrshlq_s, vrshlq_u]) ;; -(define_insn "mve_vabdq_" +(define_insn "@mve_q_" [ (set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") (match_operand:MVE_2 2 "s_register_operand" "w")] - VABDQ)) + MVE_INT_SU_BINARY)) ] "TARGET_HAVE_MVE" - "vabd.%# %q0, %q1, %q2" + ".%#\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1033,21 +1045,6 @@ (define_insn "@mve_q_n_" [(set_attr "type" "mve_move") ]) -;; -;; [vhaddq_s, vhaddq_u]) -;; -(define_insn "@mve_vhaddq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VHADDQ)) - ] - "TARGET_HAVE_MVE" - "vhadd.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vhcaddq_rot270_s]) ;; @@ -1078,21 +1075,6 @@ (define_insn "mve_vhcaddq_rot90_s" [(set_attr "type" "mve_move") ]) -;; -;; [vhsubq_s, vhsubq_u]) -;; -(define_insn "mve_vhsubq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VHSUBQ)) - ] - "TARGET_HAVE_MVE" - "vhsub.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vmaxaq_s]) ;; @@ -1293,21 +1275,6 @@ (define_insn "mve_vmlsdavxq_s" [(set_attr "type" "mve_move") ]) -;; -;; [vmulhq_s, vmulhq_u]) -;; -(define_insn "mve_vmulhq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VMULHQ)) - ] - "TARGET_HAVE_MVE" - "vmulh.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vmullbq_int_u, vmullbq_int_s]) ;; @@ -1405,51 +1372,6 @@ (define_expand "mve_vorrq_u" "TARGET_HAVE_MVE" ) -;; -;; [vqaddq_u, vqaddq_s]) -;; -(define_insn "mve_vqaddq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQADDQ)) - ] - "TARGET_HAVE_MVE" - "vqadd.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vqdmulhq_s]) -;; -(define_insn "mve_vqdmulhq_s" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQDMULHQ_S)) - ] - "TARGET_HAVE_MVE" - "vqdmulh.s%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vqrdmulhq_s]) -;; -(define_insn "mve_vqrdmulhq_s" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQRDMULHQ_S)) - ] - "TARGET_HAVE_MVE" - "vqrdmulh.s%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vqrshlq_n_s, vqrshlq_n_u]) ;; @@ -1465,21 +1387,6 @@ (define_insn "mve_vqrshlq_n_" [(set_attr "type" "mve_move") ]) -;; -;; [vqrshlq_s, vqrshlq_u]) -;; -(define_insn "mve_vqrshlq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQRSHLQ)) - ] - "TARGET_HAVE_MVE" - "vqrshl.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vqshlq_n_s, vqshlq_n_u]) ;; @@ -1510,21 +1417,6 @@ (define_insn "mve_vqshlq_r_" [(set_attr "type" "mve_move") ]) -;; -;; [vqshlq_s, vqshlq_u]) -;; -(define_insn "mve_vqshlq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQSHLQ)) - ] - "TARGET_HAVE_MVE" - "vqshl.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vqshluq_n_s]) ;; @@ -1540,51 +1432,6 @@ (define_insn "mve_vqshluq_n_s" [(set_attr "type" "mve_move") ]) -;; -;; [vqsubq_u, vqsubq_s]) -;; -(define_insn "mve_vqsubq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VQSUBQ)) - ] - "TARGET_HAVE_MVE" - "vqsub.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vrhaddq_s, vrhaddq_u]) -;; -(define_insn "@mve_vrhaddq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VRHADDQ)) - ] - "TARGET_HAVE_MVE" - "vrhadd.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - -;; -;; [vrmulhq_s, vrmulhq_u]) -;; -(define_insn "mve_vrmulhq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VRMULHQ)) - ] - "TARGET_HAVE_MVE" - "vrmulh.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vrshlq_n_u, vrshlq_n_s]) ;; @@ -1600,21 +1447,6 @@ (define_insn "mve_vrshlq_n_" [(set_attr "type" "mve_move") ]) -;; -;; [vrshlq_s, vrshlq_u]) -;; -(define_insn "mve_vrshlq_" - [ - (set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w") - (match_operand:MVE_2 2 "s_register_operand" "w")] - VRSHLQ)) - ] - "TARGET_HAVE_MVE" - "vrshl.%#\t%q0, %q1, %q2" - [(set_attr "type" "mve_move") -]) - ;; ;; [vrshrq_n_s, vrshrq_n_u]) ;; diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index f06df4db636..918338ca5c0 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -573,7 +573,7 @@ (define_expand "avg3_floor" "ARM_HAVE__ARITH" { if (TARGET_HAVE_MVE) - emit_insn (gen_mve_vhaddq (VHADDQ_S, mode, + emit_insn (gen_mve_q (VHADDQ_S, VHADDQ_S, mode, operands[0], operands[1], operands[2])); else emit_insn (gen_neon_vhadd (UNSPEC_VHADD_S, UNSPEC_VHADD_S, mode, @@ -588,7 +588,7 @@ (define_expand "uavg3_floor" "ARM_HAVE__ARITH" { if (TARGET_HAVE_MVE) - emit_insn (gen_mve_vhaddq (VHADDQ_U, mode, + emit_insn (gen_mve_q (VHADDQ_U, VHADDQ_U, mode, operands[0], operands[1], operands[2])); else emit_insn (gen_neon_vhadd (UNSPEC_VHADD_U, UNSPEC_VHADD_U, mode, @@ -603,7 +603,7 @@ (define_expand "avg3_ceil" "ARM_HAVE__ARITH" { if (TARGET_HAVE_MVE) - emit_insn (gen_mve_vrhaddq (VRHADDQ_S, mode, + emit_insn (gen_mve_q (VRHADDQ_S, VRHADDQ_S, mode, operands[0], operands[1], operands[2])); else emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_S, UNSPEC_VRHADD_S, mode, @@ -618,7 +618,7 @@ (define_expand "uavg3_ceil" "ARM_HAVE__ARITH" { if (TARGET_HAVE_MVE) - emit_insn (gen_mve_vrhaddq (VRHADDQ_U, mode, + emit_insn (gen_mve_q (VRHADDQ_U, VRHADDQ_U, mode, operands[0], operands[1], operands[2])); else emit_insn (gen_neon_vhadd (UNSPEC_VRHADD_U, UNSPEC_VRHADD_U, mode,