diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index f78fc0a60e2..315db854862 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS
 #define OPTION_MASK_ISA2_AVX5124VNNIW_SET OPTION_MASK_ISA2_AVX5124VNNIW
 #define OPTION_MASK_ISA_AVX512VBMI2_SET \
-  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
+  (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW_SET)
 #define OPTION_MASK_ISA_AVX512FP16_SET OPTION_MASK_ISA_AVX512BW_SET
 #define OPTION_MASK_ISA2_AVX512FP16_SET OPTION_MASK_ISA2_AVX512FP16
 #define OPTION_MASK_ISA_AVX512VNNI_SET \
@@ -232,7 +232,6 @@ along with GCC; see the file COPYING3.  If not see
    | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
    | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
    | OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
-   | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
    | OPTION_MASK_ISA_AVX512VNNI_UNSET \
    | OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
@@ -241,7 +240,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
 #define OPTION_MASK_ISA_AVX512BW_UNSET \
   (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
-   | OPTION_MASK_ISA_AVX512BITALG_UNSET)
+   | OPTION_MASK_ISA_AVX512VBMI2_UNSET | OPTION_MASK_ISA_AVX512BITALG_UNSET)
 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
 #define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
diff --git a/gcc/config/i386/avx512vbmi2intrin.h b/gcc/config/i386/avx512vbmi2intrin.h
index 528d1935296..ca00f8a5f14 100644
--- a/gcc/config/i386/avx512vbmi2intrin.h
+++ b/gcc/config/i386/avx512vbmi2intrin.h
@@ -326,18 +326,6 @@ _mm512_maskz_shldv_epi64 (__mmask8 __A, __m512i __B, __m512i __C, __m512i __D)
 						(__v8di) __D, (__mmask8)__A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2__
-#undef __DISABLE_AVX512VBMI2__
-
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2__ */
-
-#if !defined(__AVX512VBMI2__) || !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512bw")
-#define __DISABLE_AVX512VBMI2BW__
-#endif /* __AVX512VBMI2BW__ */
-
 extern __inline __m512i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_compress_epi8 (__m512i __A, __mmask64 __B, __m512i __C)
@@ -548,10 +536,10 @@ _mm512_maskz_shldv_epi16 (__mmask32 __A, __m512i __B, __m512i __C, __m512i __D)
 				(__v32hi) __C, (__v32hi) __D, (__mmask32)__A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2BW__
-#undef __DISABLE_AVX512VBMI2BW__
+#ifdef __DISABLE_AVX512VBMI2__
+#undef __DISABLE_AVX512VBMI2__
 
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2BW__ */
+#endif /* __DISABLE_AVX512VBMI2__ */
 
 #endif /* __AVX512VBMI2INTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/avx512vbmi2vlintrin.h b/gcc/config/i386/avx512vbmi2vlintrin.h
index 86efca2b227..92cae8cf02b 100644
--- a/gcc/config/i386/avx512vbmi2vlintrin.h
+++ b/gcc/config/i386/avx512vbmi2vlintrin.h
@@ -957,21 +957,6 @@ _mm_maskz_shldv_epi64 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
 						(__v2di) __D, (__mmask8)__A);
 }
 
-
-
-
-#ifdef __DISABLE_AVX512VBMI2VL__
-#undef __DISABLE_AVX512VBMI2VL__
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVL__ */
-
-#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || \
-    !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512vl,avx512bw")
-#define __DISABLE_AVX512VBMI2VLBW__
-#endif /* __AVX512VBMIVLBW__ */
-
 extern __inline __m256i
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_mask_compress_epi8 (__m256i __A, __mmask32 __B, __m256i __C)
@@ -1029,9 +1014,9 @@ _mm256_maskz_expandloadu_epi8 (__mmask32 __A, const void * __B)
 			(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
 }
 
-#ifdef __DISABLE_AVX512VBMI2VLBW__
-#undef __DISABLE_AVX512VBMI2VLBW__
+#ifdef __DISABLE_AVX512VBMI2VL__
+#undef __DISABLE_AVX512VBMI2VL__
 #pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVLBW__ */
+#endif /* __DISABLE_AVX512VBMIVL__ */
 
 #endif /* _AVX512VBMIVLINTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index c4167307992..1429414072a 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -430,20 +430,20 @@ BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_rdpkru,  "__builtin_ia32_rdpkru", IX86_B
 BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_wrpkru,  "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
 
 /* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask", IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask", IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask", IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
 
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
 
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
 
@@ -2553,18 +2553,18 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512
 BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpermi2varv16qi3_mask, "__builtin_ia32_vpermi2varqi128_mask", IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI)
 
 /* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask", IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask", IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask", IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask", IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz", IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask", IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
@@ -2572,7 +2572,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expan
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask", IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz", IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi, "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi, "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi_mask, "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v8hi, "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2590,7 +2590,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di, "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di_mask, "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi, "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi, "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi_mask, "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v8hi, "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2609,8 +2609,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshl
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
 
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
@@ -2637,8 +2637,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
 
 BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
 BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index deb2d747ec1..3bb78b26758 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -275,12 +275,6 @@
    V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")
    V32BF (V16BF "TARGET_AVX512VL") (V8BF "TARGET_AVX512VL")])
 
-;; Same iterator, but without supposed TARGET_AVX512BW
-(define_mode_iterator VI12_AVX512VLBW
-  [(V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
-   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
-   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
-
 (define_mode_iterator VI1_AVX512VL
   [V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")])
 
@@ -863,16 +857,15 @@
    (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
    (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
    (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
-(define_mode_iterator VI12_VI48F_AVX512VLBW
+(define_mode_iterator VI12_VI48F_AVX512VL
   [(V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
    (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")
    (V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL")
    (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
    (V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
    (V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")
-   (V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
-   (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
-   (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
+   V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")
+   V32HI (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
 
 (define_mode_iterator VI48F_256 [V8SI V8SF V4DI V4DF])
 
@@ -27453,10 +27446,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "compress<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "register_operand" "v")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
 	  UNSPEC_COMPRESS))]
   "TARGET_AVX512VBMI2"
@@ -27480,9 +27473,9 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "compressstore<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "memory_operand" "=m")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "register_operand" "x")
+  [(set (match_operand:VI12_AVX512VL 0 "memory_operand" "=m")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "register_operand" "x")
 	   (match_dup 0)
 	   (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
 	  UNSPEC_COMPRESS_STORE))]
@@ -27518,10 +27511,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "expand<mode>_mask"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v,v")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand" "v,m")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C,0C")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v,v")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v,m")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C,0C")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
 	  UNSPEC_EXPAND))]
   "TARGET_AVX512VBMI2"
@@ -27532,10 +27525,10 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn_and_split "*expand<mode>_mask"
-  [(set (match_operand:VI12_VI48F_AVX512VLBW 0 "register_operand")
-	(unspec:VI12_VI48F_AVX512VLBW
-	  [(match_operand:VI12_VI48F_AVX512VLBW 1 "nonimmediate_operand")
-	   (match_operand:VI12_VI48F_AVX512VLBW 2 "nonimm_or_0_operand")
+  [(set (match_operand:VI12_VI48F_AVX512VL 0 "register_operand")
+	(unspec:VI12_VI48F_AVX512VL
+	  [(match_operand:VI12_VI48F_AVX512VL 1 "nonimmediate_operand")
+	   (match_operand:VI12_VI48F_AVX512VL 2 "nonimm_or_0_operand")
 	   (match_operand 3 "const_int_operand")]
 	  UNSPEC_EXPAND))]
   "ix86_pre_reload_split ()
@@ -27588,10 +27581,10 @@
 })
 
 (define_expand "expand<mode>_maskz"
-  [(set (match_operand:VI12_AVX512VLBW 0 "register_operand")
-	(unspec:VI12_AVX512VLBW
-	  [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand")
-	   (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand")
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand")
+	(unspec:VI12_AVX512VL
+	  [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand")
+	   (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand")
 	   (match_operand:<avx512fmaskmode> 3 "register_operand")]
 	  UNSPEC_EXPAND))]
   "TARGET_AVX512VBMI2"
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
index ce83d63bc73..33af0d92925 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
index 424b485a203..161c2178349 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
index 24790b20cf1..c7416dab97b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
index 119b50e6f79..797ee902510 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
index 926e04d4df6..94660f26993 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
index c449d9536b9..0ee8fe472e7 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
index 4f159630504..773fce21ccf 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
index 2da92a4758b..11f4ba44723 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
index 20da53944fb..45866b6f4b9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
index fb0c58e428f..ed96b539982 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
index 0105ddbe20e..88dc48c7aeb 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
index 49d9fb89acf..9f568818493 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
index fdad38b6813..5c090a3756d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
index f465ce2d077..f9c250086e4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
index 5ddf49376ca..4c700f11e68 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
index 0377aaa19e8..1d23759428d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
index 3427b046a05..6b1dd1662ee 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
index 46370752327..a38869e0654 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
index 4436f012b65..2eeb349f71f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
index 5473a574146..6a31a4ddf06 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
index 54dd369942b..2c3a42955e1 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
index 4997c70a7b6..89bafc3d8c4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
index 6dd3f0fa2b7..5e12470f640 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
index 6e08095eade..d2805795a08 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
index 5810fa06e4c..44378a6b35c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
index 1699c262483..c7131a08444 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
index 67596eb7613..2dab24518bd 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
 #define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
index 0b29923b721..a61ff98ea66 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
index bb4de785244..7bf59672dca 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
index 7e3aef9c782..ce4410ad852 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
index e6207721cbd..dc65a21285c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
index 012ac10393d..a56c1b950fe 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
index 96e0d815f13..5600bd4be6b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
index 280aedad135..3a3bed690a1 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
index ac5c34a0f42..9a897eccfa8 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
index 2c1e00457cc..48ec1a9ea0b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
index d47e4e61707..99d5154a1c5 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
index 7a5575e41a1..a95b443b744 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
index 95695527b47..79248e0281e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
index cd2c751ba81..58481c4e1a4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
index 451487de6be..54e8193f19f 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
index fa593f5d5ba..8d810077451 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
index bf229155a02..3b2c29d02d6 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
index 61e0708797b..02adfbf4189 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
index 4e6ceb2787a..243878c853e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
index 6d8ab79bcad..a9e47ba64ac 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
index da74a62c724..9b4f2f2d17e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
index 50a3c00c640..2b161fceeed 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
index 507034b2288..bfb32afb2f9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
index 135dbd7577e..2f7d5158c4d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)"  1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
index d54e8033a25..688d1be893c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
index a46ca78a621..ed061a92fc9 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
 /* { dg-require-effective-target avx512vl } */
 /* { dg-require-effective-target avx512vbmi2 } */
 
