diff mbox series

RISC-V: Add vmerge C++ API test

Message ID	20230209220214.29208-1-juzhe.zhong@rivai.ai
State	Accepted
Headers	Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5C8A63858C50 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, Ju-Zhe Zhong <juzhe.zhong@rivai.ai> Subject: [PATCH] RISC-V: Add vmerge C++ API test Date: Fri, 10 Feb 2023 06:02:14 +0800 Message-Id: <20230209220214.29208-1-juzhe.zhong@rivai.ai> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 Precedence: list Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?=
Series	RISC-V: Add vmerge C++ API test \| RISC-V: Add vmerge C++ API test

Checks

Context	Check	Description
snail/gcc-patch-check	success	Github commit url

Commit Message

juzhe.zhong@rivai.ai Feb. 9, 2023, 10:02 p.m. UTC

  From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/testsuite/ChangeLog:

        * g++.target/riscv/rvv/base/vmerge_vvm-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm-3.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm-4.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm-5.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm-6.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-3.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-4.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-5.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vvm_tu-6.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv32-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv32-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv32-3.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv64-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv64-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_rv64-3.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-3.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-1.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-2.C: New test.
        * g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-3.C: New test.

---
 .../g++.target/riscv/rvv/base/vmerge_vvm-1.C  | 292 ++++++++++++++++++
 .../g++.target/riscv/rvv/base/vmerge_vvm-2.C  | 292 ++++++++++++++++++
 .../g++.target/riscv/rvv/base/vmerge_vvm-3.C  | 292 ++++++++++++++++++
 .../g++.target/riscv/rvv/base/vmerge_vvm-4.C  | 292 ++++++++++++++++++
 .../g++.target/riscv/rvv/base/vmerge_vvm-5.C  | 292 ++++++++++++++++++
 .../g++.target/riscv/rvv/base/vmerge_vvm-6.C  | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-1.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-2.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-3.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-4.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-5.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vvm_tu-6.C          | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv32-1.C        | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv32-2.C        | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv32-3.C        | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv64-1.C        | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv64-2.C        | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_rv64-3.C        | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv32-1.C     | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv32-2.C     | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv32-3.C     | 289 +++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv64-1.C     | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv64-2.C     | 292 ++++++++++++++++++
 .../riscv/rvv/base/vmerge_vxm_tu_rv64-3.C     | 292 ++++++++++++++++++
 24 files changed, 6990 insertions(+)
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-3.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-4.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-5.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-6.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-3.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-4.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-5.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-6.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-3.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-3.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-3.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-2.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-3.C

diff mbox series

Patch

diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-1.C
new file mode 100644
index 00000000000..592c5120459
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-1.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-2.C
new file mode 100644
index 00000000000..c083f45b627
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-2.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-3.C
new file mode 100644
index 00000000000..55fc8c48462
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-3.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-4.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-4.C
new file mode 100644
index 00000000000..592c5120459
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-4.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-5.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-5.C
new file mode 100644
index 00000000000..c083f45b627
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-5.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-6.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-6.C
new file mode 100644
index 00000000000..55fc8c48462
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm-6.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-1.C
new file mode 100644
index 00000000000..e7ca8eba903
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-1.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-2.C
new file mode 100644
index 00000000000..b2a4db68041
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-2.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-3.C
new file mode 100644
index 00000000000..ef59cd9ae22
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-3.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-4.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-4.C
new file mode 100644
index 00000000000..e7ca8eba903
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-4.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-5.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-5.C
new file mode 100644
index 00000000000..b2a4db68041
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-5.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-6.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-6.C
new file mode 100644
index 00000000000..ef59cd9ae22
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vvm_tu-6.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,vint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,vint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,vint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,vint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,vint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,vint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,vint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,vint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,vint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,vint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,vint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,vint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,vint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,vint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,vint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,vint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,vint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,vint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,vint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,vint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,vint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,vint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,vuint8mf8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,vuint8mf4_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,vuint8mf2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,vuint8m1_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,vuint8m2_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,vuint8m4_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,vuint8m8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,vuint16mf4_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,vuint16mf2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,vuint16m1_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,vuint16m2_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,vuint16m4_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,vuint16m8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,vuint32mf2_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,vuint32m1_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,vuint32m2_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,vuint32m4_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,vuint32m8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,vuint64m1_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,vuint64m2_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,vuint64m4_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,vuint64m8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-1.C
new file mode 100644
index 00000000000..762c99999d3
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-1.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-2.C
new file mode 100644
index 00000000000..1e8084cca8e
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-2.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-3.C
new file mode 100644
index 00000000000..8245e5670e5
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv32-3.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-1.C
new file mode 100644
index 00000000000..2fb1a6459dc
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-1.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-2.C
new file mode 100644
index 00000000000..57a31e79861
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-2.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-3.C
new file mode 100644
index 00000000000..8058622f8ef
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_rv64-3.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge(vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge(vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge(vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge(vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge(vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge(vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge(vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge(vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge(vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge(vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge(vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge(vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge(vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge(vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge(vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge(vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge(vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge(vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge(vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge(vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge(vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge(vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge(vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge(vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge(vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge(vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge(vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge(vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge(vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge(vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge(vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge(vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge(vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge(vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge(vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge(vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge(vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge(vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge(vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge(vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge(vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge(vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge(vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge(vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge(op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-1.C
new file mode 100644
index 00000000000..cdfd7b2305d
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-1.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-2.C
new file mode 100644
index 00000000000..43811fc5e14
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-2.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-3.C
new file mode 100644
index 00000000000..3f8ff36ea37
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv32-3.C
@@ -0,0 +1,289 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 8 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-1.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-1.C
new file mode 100644
index 00000000000..1b5219e1e0f
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-1.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,vl);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-2.C
new file mode 100644
index 00000000000..8dbf586fb90
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-2.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-3.C b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-3.C
new file mode 100644
index 00000000000..d9850c0925e
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vmerge_vxm_tu_rv64-3.C
@@ -0,0 +1,292 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vint8mf8_t test___riscv_vmerge_tu(vint8mf8_t merge,vint8mf8_t op1,int8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf4_t test___riscv_vmerge_tu(vint8mf4_t merge,vint8mf4_t op1,int8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8mf2_t test___riscv_vmerge_tu(vint8mf2_t merge,vint8mf2_t op1,int8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m1_t test___riscv_vmerge_tu(vint8m1_t merge,vint8m1_t op1,int8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m2_t test___riscv_vmerge_tu(vint8m2_t merge,vint8m2_t op1,int8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m4_t test___riscv_vmerge_tu(vint8m4_t merge,vint8m4_t op1,int8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint8m8_t test___riscv_vmerge_tu(vint8m8_t merge,vint8m8_t op1,int8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf4_t test___riscv_vmerge_tu(vint16mf4_t merge,vint16mf4_t op1,int16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16mf2_t test___riscv_vmerge_tu(vint16mf2_t merge,vint16mf2_t op1,int16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m1_t test___riscv_vmerge_tu(vint16m1_t merge,vint16m1_t op1,int16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m2_t test___riscv_vmerge_tu(vint16m2_t merge,vint16m2_t op1,int16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m4_t test___riscv_vmerge_tu(vint16m4_t merge,vint16m4_t op1,int16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint16m8_t test___riscv_vmerge_tu(vint16m8_t merge,vint16m8_t op1,int16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32mf2_t test___riscv_vmerge_tu(vint32mf2_t merge,vint32mf2_t op1,int32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m1_t test___riscv_vmerge_tu(vint32m1_t merge,vint32m1_t op1,int32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m2_t test___riscv_vmerge_tu(vint32m2_t merge,vint32m2_t op1,int32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m4_t test___riscv_vmerge_tu(vint32m4_t merge,vint32m4_t op1,int32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint32m8_t test___riscv_vmerge_tu(vint32m8_t merge,vint32m8_t op1,int32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m1_t test___riscv_vmerge_tu(vint64m1_t merge,vint64m1_t op1,int64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m2_t test___riscv_vmerge_tu(vint64m2_t merge,vint64m2_t op1,int64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m4_t test___riscv_vmerge_tu(vint64m4_t merge,vint64m4_t op1,int64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vint64m8_t test___riscv_vmerge_tu(vint64m8_t merge,vint64m8_t op1,int64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf8_t test___riscv_vmerge_tu(vuint8mf8_t merge,vuint8mf8_t op1,uint8_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf4_t test___riscv_vmerge_tu(vuint8mf4_t merge,vuint8mf4_t op1,uint8_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8mf2_t test___riscv_vmerge_tu(vuint8mf2_t merge,vuint8mf2_t op1,uint8_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m1_t test___riscv_vmerge_tu(vuint8m1_t merge,vuint8m1_t op1,uint8_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m2_t test___riscv_vmerge_tu(vuint8m2_t merge,vuint8m2_t op1,uint8_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m4_t test___riscv_vmerge_tu(vuint8m4_t merge,vuint8m4_t op1,uint8_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint8m8_t test___riscv_vmerge_tu(vuint8m8_t merge,vuint8m8_t op1,uint8_t op2,vbool1_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf4_t test___riscv_vmerge_tu(vuint16mf4_t merge,vuint16mf4_t op1,uint16_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16mf2_t test___riscv_vmerge_tu(vuint16mf2_t merge,vuint16mf2_t op1,uint16_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m1_t test___riscv_vmerge_tu(vuint16m1_t merge,vuint16m1_t op1,uint16_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m2_t test___riscv_vmerge_tu(vuint16m2_t merge,vuint16m2_t op1,uint16_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m4_t test___riscv_vmerge_tu(vuint16m4_t merge,vuint16m4_t op1,uint16_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint16m8_t test___riscv_vmerge_tu(vuint16m8_t merge,vuint16m8_t op1,uint16_t op2,vbool2_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32mf2_t test___riscv_vmerge_tu(vuint32mf2_t merge,vuint32mf2_t op1,uint32_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m1_t test___riscv_vmerge_tu(vuint32m1_t merge,vuint32m1_t op1,uint32_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m2_t test___riscv_vmerge_tu(vuint32m2_t merge,vuint32m2_t op1,uint32_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m4_t test___riscv_vmerge_tu(vuint32m4_t merge,vuint32m4_t op1,uint32_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint32m8_t test___riscv_vmerge_tu(vuint32m8_t merge,vuint32m8_t op1,uint32_t op2,vbool4_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m1_t test___riscv_vmerge_tu(vuint64m1_t merge,vuint64m1_t op1,uint64_t op2,vbool64_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m2_t test___riscv_vmerge_tu(vuint64m2_t merge,vuint64m2_t op1,uint64_t op2,vbool32_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m4_t test___riscv_vmerge_tu(vuint64m4_t merge,vuint64m4_t op1,uint64_t op2,vbool16_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+vuint64m8_t test___riscv_vmerge_tu(vuint64m8_t merge,vuint64m8_t op1,uint64_t op2,vbool8_t selector,size_t vl)
+{
+    return __riscv_vmerge_tu(merge,op1,op2,selector,32);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */
+/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*tu,\s*m[au]\s+vmerge\.vxm\s+v[0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+,\s*v[0-9]+\s+} 2 } } */