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Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT062.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR08MB10259 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755560790084412558?= X-GMAIL-MSGID: =?utf-8?q?1755560790084412558?= gcc/ChangeLog: * config/arm/mve.md (mve_vqnegq_s): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Improve test. * gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise. --- gcc/config/arm/mve.md | 2 +- .../arm/mve/intrinsics/vqnegq_m_s16.c | 33 +++++++++++++++++-- .../arm/mve/intrinsics/vqnegq_m_s32.c | 33 +++++++++++++++++-- .../arm/mve/intrinsics/vqnegq_m_s8.c | 33 +++++++++++++++++-- .../arm/mve/intrinsics/vqnegq_s16.c | 28 +++++++++++++--- .../arm/mve/intrinsics/vqnegq_s32.c | 24 ++++++++++++-- .../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 24 ++++++++++++-- 7 files changed, 159 insertions(+), 18 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 600adf7d69b..4f94cf14a0b 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -374,7 +374,7 @@ (define_insn "mve_vqnegq_s" VQNEGQ_S)) ] "TARGET_HAVE_MVE" - "vqneg.s%# %q0, %q1" + "vqneg.s%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c index 4f0145d2ebd..f3799a35b12 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vqnegq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqnegt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vqnegq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c index da4f90bad53..bbe64ff4d52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vqnegq_m_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqnegt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vqnegq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c index ac1250b2fac..71fcdd7cba7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vqnegq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqnegt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vqnegq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c index f9210cd70f4..d5fb4a19854 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vqnegq_s16 (a); } -/* { dg-final { scan-assembler "vqneg.s16" } } */ +/* +**foo1: +** ... +** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vqnegq (a); } -/* { dg-final { scan-assembler "vqneg.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c index c2ded7fe659..2c8e709f491 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vqnegq_s32 (a); } -/* { dg-final { scan-assembler "vqneg.s32" } } */ +/* +**foo1: +** ... +** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vqnegq (a); } -/* { dg-final { scan-assembler "vqneg.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c index d1cc83a6cd0..2f7f7619ef6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vqnegq_s8 (a); } -/* { dg-final { scan-assembler "vqneg.s8" } } */ +/* +**foo1: +** ... +** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vqnegq (a); } -/* { dg-final { scan-assembler "vqneg.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file